SR

Sudipta K. Ray

IBM: 50 patents #1,732 of 70,183Top 3%
JU Jds Uniphase: 1 patents #393 of 940Top 45%
Overall (All Time): #52,931 of 4,157,543Top 2%
51
Patents All Time

Issued Patents All Time

Showing 25 most recent of 51 patents

Patent #TitleCo-InventorsDate
9433105 Method of fabricating printed circuit boards Richard S. Graf, Thomas E. Lombardi, David J. West 2016-08-30
8466543 Three dimensional stacked package structure Thomas J. Fleischman, Eric D. Perfecto 2013-06-18
8450849 Robust FBEOL and UBM structure of C4 interconnects Minhua Lu, Eric D. Pefecto, David L. Questad 2013-05-28
8304290 Overcoming laminate warpage and misalignment in flip-chip packages Richard S. Graf, Thomas E. Lombardi, David J. West 2012-11-06
8227918 Robust FBEOL and UBM structure of C4 interconnects Minhua Lu, Eric D. Pefecto, David L. Questad 2012-07-24
7806341 Structure for implementing secure multichip modules for encryption applications Mukta G. Farooq, Benjamin V. Fasano, Jason L. Frankel, Harvey C. Hamel, Suresh D. Kadakia +2 more 2010-10-05
7472836 Method and structure for implementing secure multichip modules for encryption applications Mukta G. Farooq, Benjamin V. Fasano, Jason L. Frankel, Harvey C. Hamel, Suresh D. Kadakia +2 more 2009-01-06
7281667 Method and structure for implementing secure multichip modules for encryption applications Mukta G. Farooq, Benjamin V. Fasano, Jason L. Frankel, Harvey C. Hamel, Suresh D. Kadakia +2 more 2007-10-16
6984792 Dielectric interposer for chip to substrate soldering Peter J. Brofman, Shaji Farooq, John U. Knickerbocker, Scott I. Langenthal, Kathleen A. Stalter 2006-01-10
6908025 Preparing MCM hat for removal Patrick A. Coico, Steven P. Ostrander 2005-06-21
6878608 Method of manufacture of silicon based package Peter J. Brofman, Glenn G. Daves, Herbert I. Stoller 2005-04-12
6827505 Optoelectronic package structure and process for planar passive optical and optoelectronic devices Subhash L. Shinde, L. Wynn Herron, Mario J. Interrante, How T. Lin, Steven P. Ostrander +2 more 2004-12-07
6784086 Lead-free solder structure and method for high fatigue life Amit K. Sarkhel 2004-08-31
6762119 Method of preventing solder wetting in an optical device using diffusion of Cr Mitchell S. Cohen, Lester W. Herron, Mario J. Interrante, Thomas E. Lombardi, Subhash L. Shinde 2004-07-13
6713686 Apparatus and method for repairing electronic packages Wiren D. Becker, Dinesh Gupta, Robert A. Rita, Herbert I. Stoller, Kathleen M. Wiley 2004-03-30
6657313 Dielectric interposer for chip to substrate soldering Peter J. Brofman, Shaji Faroon, John U. Knickerbocker, Scott I. Langenthal, Kathleen A. Stalter 2003-12-02
6574859 Interconnection process for module assembly and rework Shaji Farooq, Mario J. Interrante, William E. Sablinski 2003-06-10
6559527 Process for forming cone shaped solder for chip interconnection Peter J. Brofman, Shaji Farooq, John U. Knickerbocker, Scott I. Langenthal, Kathleen A. Stalter 2003-05-06
6548909 Method of interconnecting electronic components using a plurality of conductive studs Peter J. Brofman, Kathleen A. Stalter 2003-04-15
6502999 Opto-electronic transceiver module and hermetically sealed housing therefore Mitchell S. Cohen, David Peter Gaio, William K. Hogan, Steven P. Ostrander, Jeannine M. Trewhella 2003-01-07
6429388 High density column grid array connections and method thereof Mario J. Interrante, Brenda Peterson, William E. Sablinski, Amit K. Sarkhel 2002-08-06
6395991 Column grid array substrate attachment with heat sink stress relief Robert Charles Dockerty, Ronald Maurice Fraga, Ciro Neal Ramirez, Gordon J. Robbins 2002-05-28
6360938 Process and apparatus to remove closely spaced chips on a multi-chip module Stephen A. DeLaurentis, Mario J. Interrante, Raymond A. Jackson, John U. Knickerbocker, Kathleen A. Stalter 2002-03-26
6350625 Optoelectronic packaging submount arrangement providing 90 degree electrical conductor turns and method of forming thereof Mitchell S. Cohen, William K. Hogan, James L. Speidell, S. Jay Chey, Steven A. Cordes 2002-02-26
6335210 Baseplate for chip burn-in and/of testing, and method thereof Mukta S. Farooq, Raymond A. Jackson, Sarah H. Knickerbocker 2002-01-01