Issued Patents All Time
Showing 25 most recent of 47 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11810893 | Silicon interposer sandwich structure for ESD, EMC, and EMC shielding and protection | William E. Bernier, Bing Dang, John U. Knickerbocker, Son K. Tran | 2023-11-07 |
| 11049841 | Silicon interposer sandwich structure for ESD, EMC, and EMC shielding and protection | William E. Bernier, Bing Dang, John U. Knickerbocker, Son K. Tran | 2021-06-29 |
| 10903187 | Selective area heating for 3D chip stack | Katsuyuki Sakuma | 2021-01-26 |
| 10262970 | Selective area heating for 3D chip stack | Katsuyuki Sakuma | 2019-04-16 |
| 9860996 | Selective area heating for 3D chip stack | Katsuyuki Sakuma | 2018-01-02 |
| 9431366 | Selective area heating for 3D chip stack | Katsuyuki Sakuma | 2016-08-30 |
| 9373590 | Integrated circuit bonding with interposer die | Katsuyuki Sakuma | 2016-06-21 |
| 9224712 | 3D bond and assembly process for severely bowed interposer die | Marcus E. Interrante, Katsuyuki Sakuma | 2015-12-29 |
| 9105629 | Selective area heating for 3D chip stack | Katsuyuki Sakuma | 2015-08-11 |
| 9059241 | 3D assembly for interposer bow | Katsuyuki Sakuma | 2015-06-16 |
| 8689437 | Method for forming integrated circuit assembly | Bing Dang, David Danovitch, John U. Knickerbocker, Michael J. Shapiro, Van Thanh Truong | 2014-04-08 |
| 8614512 | Solder ball contact susceptible to lower stress | Luc Guerin, Michael J. Shapiro, Thuy L. Tran-Quinn, Van Thanh Truong | 2013-12-24 |
| 8487447 | Semiconductor structure having offset passivation to reduce electromigration | Gary LaFontant, Michael J. Shapiro, Thomas A. Wassick, Bucknell C. Webb | 2013-07-16 |
| 8383505 | Solder ball contact susceptible to lower stress | Luc Guerin, Michael J. Shapiro, Thuy L. Tran-Quinn, Van Thanh Truong | 2013-02-26 |
| 7781232 | Method to recover underfilled modules by selective removal of discrete components | Charles L. Arvin, Benjamin V. Fasano, Glenn A. Pomerantz | 2010-08-24 |
| 6917113 | Lead-free alloys for column/ball grid arrays, organic interposers and passive component assembly | Mukta G. Farooq | 2005-07-12 |
| 6892925 | Solder hierarchy for lead free solder joint | Mukta G. Farooq, William E. Sablinski | 2005-05-17 |
| 6854636 | Structure and method for lead free solder electronic package interconnections | Mukta G. Farooq, William E. Sablinski | 2005-02-15 |
| 6827505 | Optoelectronic package structure and process for planar passive optical and optoelectronic devices | Subhash L. Shinde, L. Wynn Herron, How T. Lin, Steven P. Ostrander, Sudipta K. Ray +2 more | 2004-12-07 |
| 6762119 | Method of preventing solder wetting in an optical device using diffusion of Cr | Sudipta K. Ray, Mitchell S. Cohen, Lester W. Herron, Thomas E. Lombardi, Subhash L. Shinde | 2004-07-13 |
| 6740959 | EMI shielding for semiconductor chip carriers | David J. Alcoe, Jeffrey T. Coffin, Michael A. Gaynes, Harvey C. Hamel, Brenda Peterson +6 more | 2004-05-25 |
| 6574859 | Interconnection process for module assembly and rework | Shaji Farooq, Sudipta K. Ray, William E. Sablinski | 2003-06-10 |
| 6532654 | Method of forming an electrical connector | Luc Guerin, Mark J. LaPlante, David C. Long, Gregory B. Martin, Thomas P. Moyer +2 more | 2003-03-18 |
| 6518674 | Temporary attach article and method for temporary attach of devices to a substrate | Thomas E. Lombardi, Frank L. Pompeo, William E. Sablinski | 2003-02-11 |
| 6497357 | Apparatus and method for removing interconnections | Raymond A. Jackson, Scott A. Bradley, Stephen A. DeLaurentis, David C. Linnell | 2002-12-24 |