Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8097492 | Method and manufacture of silicon based package and devices manufactured thereby | John Harold Magerlein, Chirag S. Patel, Edmund J. Sprogis | 2012-01-17 |
| 7855442 | Silicon based package | John Harold Magerlein, Chirag S. Patel, Edmund J. Sprogis | 2010-12-21 |
| 7193318 | Multiple power density chip structure | Evan G. Colgan, George A. Katopis, Chandrashekhar Ramaswamy | 2007-03-20 |
| 7189595 | Method of manufacture of silicon based package and devices manufactured thereby | John Harold Magerlein, Chirag S. Patel, Edmund J. Sprogis | 2007-03-13 |
| 6974722 | Jogging structure for wiring translation between grids with non-integral pitch ratios in chip carrier modules | Glenn G. Daves, Jason L. Frankel, William F. Shutler, Anthony Wayne Sigler, John Vetrero +1 more | 2005-12-13 |
| 6878608 | Method of manufacture of silicon based package | Peter J. Brofman, Glenn G. Daves, Sudipta K. Ray | 2005-04-12 |
| 6762489 | Jogging structure for wiring translation between grids with non-integral pitch ratios in chip carrier modules | Glenn G. Daves, Jason L. Frankel, William F. Shutler, Anthony Wayne Sigler, John Vetrero +1 more | 2004-07-13 |
| 6713686 | Apparatus and method for repairing electronic packages | Wiren D. Becker, Dinesh Gupta, Sudipta K. Ray, Robert A. Rita, Kathleen M. Wiley | 2004-03-30 |
| 6430030 | High k dielectric material with low k dielectric sheathed signal vias | Mukta S. Farooq, Harvey C. Hamel, Robert A. Rita | 2002-08-06 |
| 6392896 | Semiconductor package containing multiple memory units | — | 2002-05-21 |
| 6261467 | Direct deposit thin film single/multi chip module | Ajay P. Giri, Sundar M. Kamath, Daniel O'Connor, Rajesh B. Patel, Lisa M. Studzinski +1 more | 2001-07-17 |
| 6216324 | Method for a thin film multilayer capacitor | Mukta S. Farooq, Shaji Farooq, Harvey C. Hamel, John U. Knickerbocker, Robert A. Rita | 2001-04-17 |
| 6200400 | Method for making high k dielectric material with low k dielectric sheathed signal vias | Mukta S. Farooq, Harvey C. Hamel, Robert A. Rita | 2001-03-13 |
| 6072690 | High k dielectric capacitor with low k sheathed signal vias | Mukta S. Farooq, Harvey C. Hamel, Robert A. Rita | 2000-06-06 |
| 6037044 | Direct deposit thin film single/multi chip module | Ajay P. Giri, Sundar M. Kamath, Daniel O'Connor, Rajesh B. Patel, Lisa M. Studzinski +1 more | 2000-03-14 |
| 6023407 | Structure for a thin film multilayer capacitor | Mukta S. Farooq, Shaji Farooq, Harvey C. Hamel, John U. Knickerbocker, Robert A. Rita | 2000-02-08 |
| 5635761 | Internal resistor termination in multi-chip module environments | Tai A. Cao, Thanh D. Trinh, Lloyd A. Walls | 1997-06-03 |
| 5243140 | Direct distribution repair and engineering change system | Harsaran S. Bhatia, Mario J. Interrante, Suresh D. Kadakia, Shashi D. Malaviya, Mark H. McLeod +1 more | 1993-09-07 |
| 5060116 | Electronics system with direct write engineering change capability | Warren D. Grobman, Charles J. Kraus, by Paula A. Kraus, executrix, Leon L. Wu | 1991-10-22 |
| 4688151 | Multilayered interposer board for powering high current chip modules | Charles J. Kraus, Leon L. Wu | 1987-08-18 |
| 4546413 | Engineering change facility on both major surfaces of chip module | Irving Feinberg, Charles J. Kraus | 1985-10-08 |
| 4535388 | High density wired module | Charles J. Kraus, Leon L. Wu | 1985-08-13 |
| 4252581 | Selective epitaxy method for making filamentary pedestal transistor | Narasipur G. Anantha, Joseph R. Cavaliere, Richard R. Konian, Gurumakonda R. Srinivasan, James L. Walsh | 1981-02-24 |