Issued Patents All Time
Showing 25 most recent of 30 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7704802 | Programmable random logic arrays using PN isolation | Eric V. Kline | 2010-04-27 |
| 7701874 | Intelligent sensor network | Eric V. Kline | 2010-04-20 |
| 7420248 | Programmable random logic arrays using PN isolation | Eric V. Kline | 2008-09-02 |
| 7325213 | Nested design approach | Marie Cole, Michael S. Cranmer, Jason L. Frankel, Eric V. Kline, Kenneth A. Papae +1 more | 2008-01-29 |
| 6975199 | Embedded inductor and method of making | David C. Long, Harvey C. Hamel, Edward R. Pillai, Christopher D. Setzer, Benjamin Tongue | 2005-12-13 |
| 6931712 | Method of forming a dielectric substrate having a multiturn inductor | David C. Long, Harvey C. Hamel, Edward R. Pillai, Christopher D. Setzer, Benjamin Tongue | 2005-08-23 |
| 6806793 | MLC frequency selective circuit structures | Harvey C. Hamel, David C. Long, Edward R. Pillai, Christopher D. Setzer, Benjamin Tongue | 2004-10-19 |
| 6573728 | Method and circuit for electrical testing of isolation resistance of large capacitance network | David C. Long, Kathleen M. Wiley | 2003-06-03 |
| 6528735 | Substrate design of a chip using a generic substrate design | Raymond Morris Bryant, Suresh D. Kadakia, David C. Long, Paul R. Walling | 2003-03-04 |
| 6203926 | Corrosion-free multi-layer conductor | Umar M. Ahmad, Satya Pal Singh Bhatia, Hormazdyar M. Dalal, William H. Price, Sampath Purushothaman | 2001-03-20 |
| 5427983 | Process for corrosion free multi-layer metal conductors | Umar M. Ahmad, Satya Pal Singh Bhatia, Hormazdyar M. Dalal, William H. Price, Sampath Purushothaman | 1995-06-27 |
| 5243140 | Direct distribution repair and engineering change system | Mario J. Interrante, Suresh D. Kadakia, Shashi D. Malaviya, Mark H. McLeod, Sudipta K. Ray +1 more | 1993-09-07 |
| 4796069 | Schottky diode having limited area self-aligned guard ring and method for making same | Narasipur G. Anantha, Santosh P. Gaur, John L. Mauer, IV | 1989-01-03 |
| 4746815 | Electronic EC for minimizing EC pads | Mario E. Ecker, Harry J. Jones, Shashi D. Malaviya | 1988-05-24 |
| 4743781 | Dotting circuit with inhibit function | Harry J. Jones, Shashi D. Malaviya | 1988-05-10 |
| 4712125 | Structure for contacting a narrow width PN junction region | Satyapal S. Bhatia, Jacob Riseman, Emmanuel A. Valsamakis | 1987-12-08 |
| 4691435 | Method for making Schottky diode having limited area self-aligned guard ring | Narasipur G. Anantha, Santosh P. Gaur, John L. Mauer, IV | 1987-09-08 |
| 4535531 | Method and resulting structure for selective multiple base width transistor structures | Jack A. Dorler, Santosh P. Gaur, John S. Lechaton, Joseph M. Mosley, Gurumakonda R. Srinivasan | 1985-08-20 |
| 4507171 | Method for contacting a narrow width PN junction region | Satyapal S. Bhatia, Jacob Riseman, Emmanuel A. Valsamakis | 1985-03-26 |
| 4464212 | Method for making high sheet resistivity resistors | Jacob Riseman | 1984-08-07 |
| 4427989 | High density memory cell | Narasipur G. Anantha, Santosh P. Gaur, James L. Walsh | 1984-01-24 |
| 4426655 | Memory cell resistor device | David B. Eardley, Santosh P. Gaur | 1984-01-17 |
| 4389294 | Method for avoiding residue on a vertical walled mesa | Narasipur G. Anantha, John L. Mauer, IV, Homi G. Sarkary | 1983-06-21 |
| 4389281 | Method of planarizing silicon dioxide in semiconductor devices | Narasipur G. Anantha, John S. Lechaton, James L. Walsh | 1983-06-21 |
| T101201 | Method for making stable nitride-defined Schottky barrier diodes | Narasipur G. Anantha | 1981-11-03 |