Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8360006 | Cat litter box liner with an absorbent scratch resistant pad | Marie Lechaton | 2013-01-29 |
| 7225915 | Mountable cleaning apparatus for commercial conveyors | Carol Kelly | 2007-06-05 |
| 5279987 | Fabricating planar complementary patterned subcollectors with silicon epitaxial layer | Shaw-Ning Mei, Dominic J. Schepis, Mithkal M. Smadi | 1994-01-18 |
| 5086016 | Method of making semiconductor device contact including transition metal-compound dopant source | Stephen Bruce Brodsky, Rajiv V. Joshi, James G. Ryan, Dominic J. Schepis | 1992-02-04 |
| 4960726 | BiCMOS process | Dominic J. Schepis | 1990-10-02 |
| 4752817 | High performance integrated circuit having modified extrinsic base | Philip M. Pitner, Gurumakonda R. Srinivasan | 1988-06-21 |
| 4726879 | RIE process for etching silicon isolation trenches and polycides with vertical surfaces | James A. Bondur, Nicholas J. Giammarco, Thomas Hansen, George A. Kaplita | 1988-02-23 |
| 4661832 | Total dielectric isolation for integrated circuits | Shashi D. Malaviya, Dominic J. Schepis, Gurumakonda R. Srinivasan | 1987-04-28 |
| 4573256 | Method for making a high performance transistor integrated circuit | Philip M. Pitner, Gurumakonda R. Srinivasan | 1986-03-04 |
| 4535531 | Method and resulting structure for selective multiple base width transistor structures | Harsaran S. Bhatia, Jack A. Dorler, Santosh P. Gaur, Joseph M. Mosley, Gurumakonda R. Srinivasan | 1985-08-20 |
| 4502913 | Total dielectric isolation for integrated circuits | Shashi D. Malaviya, Dominic J. Schepis, Gurumakonda R. Srinivasan | 1985-03-05 |
| 4435898 | Method for making a base etched transistor integrated circuit | Santosh P. Gaur, Gurumakonda R. Srinivasan | 1984-03-13 |
| 4389281 | Method of planarizing silicon dioxide in semiconductor devices | Narasipur G. Anantha, Harsaran S. Bhatia, James L. Walsh | 1983-06-21 |