Issued Patents All Time
Showing 25 most recent of 40 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11596054 | Method of producing printed circuit boards with routing conductors and dielectric strands | Yanyan Zhang, Jinwoo Choi, Mehdi Mohamed Mechaik | 2023-02-28 |
| 10795573 | Method and apparatus for virtual braille keyboard | Bruce J. MacIsaac, Rosanna S. Mannan | 2020-10-06 |
| 10705134 | High speed chip substrate test fixture | Nam H. Pham, Jason R. Eagle, Nathan Lee Dunfee, Pavel Roy Paladhi | 2020-07-07 |
| 10620253 | Noise modulation for on-chip noise measurement | Jose A. Hejase, Nanju Na, Nam H. Pham | 2020-04-14 |
| 10542618 | Printed circuit board with routing of a conductor and dielectric strands | Yanyan Zhang, Jinwoo Choi, Mehdi Mohamed Mechaik | 2020-01-21 |
| 9893400 | Method for performing frequency band splitting | Jose A. Hejase, Rubina F. Ahmed, Daniel M. Dreps, James D. Jordan, Nam H. Pham | 2018-02-13 |
| 9835665 | Noise modulation for on-chip noise measurement | Jose A. Hejase, Nanju Na, Nam H. Pham | 2017-12-05 |
| 9797938 | Noise modulation for on-chip noise measurement | Jose A. Hejase, Nanju Na, Nam H. Pham | 2017-10-24 |
| 9548769 | Reduced wiring requirements with signal slope manipulation | Kevin Bills, Mahesh Bohra, Jinwoo Choi | 2017-01-17 |
| 9536604 | Impedance matching system for DDR memory | Daniel M. Dreps, Keenan W. Franz, Nam H. Pham | 2017-01-03 |
| 9368852 | Method for performing frequency band splitting | Jose A. Hejase, Rubina F. Ahmed, Daniel M. Dreps, James D. Jordan, Nam H. Pham | 2016-06-14 |
| 9253874 | Printed circuit board having DC blocking dielectric waveguide vias | Jose A. Hajase, Nanju Na, Nam H. Pham | 2016-02-02 |
| 9209583 | Multi-level connector and use thereof that mitigates data signaling reflections | Michael D. Hasse, Nanju Na, Nam H. Pham | 2015-12-08 |
| 9118144 | Multi-level connector and use thereof that mitigates data signaling reflections | Michael D. Hasse, Nanju Na, Nam H. Pham | 2015-08-25 |
| 8743558 | Reduced wiring requirements with signal slope manipulation | Kevin Bills, Mahesh Bohra, Jinwoo Choi | 2014-06-03 |
| 8722536 | Fabrication method for circuit substrate having post-fed die side power supply connections | Daniel Douriet, Francesco Preda, Brian L. Singletary | 2014-05-13 |
| 8716851 | Continuously referencing signals over multiple layers in laminate packages | Francesco Preda | 2014-05-06 |
| 8586476 | Fabrication method for circuit substrate having post-fed die side power supply connections | Daniel Douriet, Francesco Preda, Brian L. Singletary | 2013-11-19 |
| 8425115 | Multi-layered thermal sensor for integrated circuits and other layered structures | Aquilur Rahman | 2013-04-23 |
| 8358509 | Reduced wiring requirements with signal slope manipulation | Kevin Bills, Mahesh Bohra, Jinwoo Choi | 2013-01-22 |
| 8158461 | Continuously referencing signals over multiple layers in laminate packages | Francesco Preda | 2012-04-17 |
| 7946763 | Multi-layered thermal sensor for integrated circuits and other layered structures | Aquilur Rahman | 2011-05-24 |
| 7863724 | Circuit substrate having post-fed die side power supply connections | Daniel Douriet, Francesco Preda, Brian L. Singletary | 2011-01-04 |
| 7510323 | Multi-layered thermal sensor for integrated circuits and other layered structures | Aquilur Rahman | 2009-03-31 |
| 7095788 | Circuit for facilitating simultaneous multi-directional transmission of multiple signals between multiple circuits using a single transmission line | Tai Anh Cao | 2006-08-22 |