Issued Patents All Time
Showing 25 most recent of 68 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10750615 | Method and apparatus for strain relieving surface mount attached connectors | Michael A. Gaynes, Jeffrey D. Gelorme, Robert P. Kuder, II, Daniel J. Littrell, Thomas E. Lombardi +5 more | 2020-08-18 |
| 10699972 | Flat laminate, symmetrical test structures and method of use to gauge white bump sensitivity | William E. Bernier, Timothy H. Daubenspeck, Virendra R. Jadhav, Valerie Oberson | 2020-06-30 |
| 10381276 | Test cell for laminate and method | Sushumna Iruvanti, Shidong Li, Marek A. Orlowski, Tuhin Sinha, Krishna R. Tunga +3 more | 2019-08-13 |
| 10368441 | Method and apparatus for strain relieving surface mount attached connectors | Michael A. Gaynes, Jeffrey D. Gelorme, Robert P. Kuder, II, Daniel J. Littrell, Thomas E. Lombardi +5 more | 2019-07-30 |
| 10342160 | Heat sink attachment on existing heat sinks | Louis-Marie Achard, Kenneth C. Marston, Janak G. Patel | 2019-07-02 |
| 10249548 | Test cell for laminate and method | Sushumna Iruvanti, Shidong Li, Marek A. Orlowski, Tuhin Sinha, Krishna R. Tunga +3 more | 2019-04-02 |
| 10014273 | Fixture to constrain laminate and method of assembly | Thomas E. Lombardi, Donald A. Merte, Gregg B. Monjeau, Son K. Tran | 2018-07-03 |
| 9974179 | Method and apparatus for strain relieving surface mount attached connectors | Michael A. Gaynes, Jeffrey D. Gelorme, Robert P. Kuder, II, Daniel J. Littrell, Thomas E. Lombardi +5 more | 2018-05-15 |
| 9899279 | Flat laminate, symmetrical test structures and method of use to gauge white bump sensitivity | William E. Bernier, Timothy H. Daubenspeck, Virendra R. Jadhav, Valerie Oberson | 2018-02-20 |
| 9883612 | Heat sink attachment on existing heat sinks | Louis-Marie Achard, Kenneth C. Marston, Janak G. Patel | 2018-01-30 |
| 9627784 | Method and apparatus for strain relieving surface mount attached connectors | Michael A. Gaynes, Jeffrey D. Gelorme, Robert P. Kuder, II, Daniel J. Littrell, Thomas E. Lombardi +5 more | 2017-04-18 |
| 9508789 | Electronic components on trenched substrates and method of forming same | Vijayeshwar D. Khanna, Jennifer V. Muncy, Arun Sharma, Sri M. Sri-Jayantha, Lorenzo Valdevit | 2016-11-29 |
| 9455234 | Fixture to constrain laminate and method of assembly | Thomas E. Lombardi, Donald A. Merte, Gregg B. Monjeau, Son K. Tran | 2016-09-27 |
| 9099458 | Construction of reliable stacked via in electronic substrates—vertical stiffness control method | Karan Kacker, Douglas O. Powell, David J. Russell, Sri M. Sri-Jayantha | 2015-08-04 |
| 9018760 | Solder interconnect with non-wettable sidewall pillars and methods of manufacture | Charles L. Arvin, Raschid J. Bezama, Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy +3 more | 2015-04-28 |
| 8957531 | Flat laminate, symmetrical test structures and method of use to gauge white bump sensitivity | William E. Bernier, Timothy H. Daubenspeck, Virendra R. Jadhav, Valerie Oberson | 2015-02-17 |
| 8927334 | Overcoming chip warping to enhance wetting of solder bumps and flip chip attaches in a flip chip package | Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy, Nathalie Normand, Wolfgang Sauter +1 more | 2015-01-06 |
| 8866026 | Construction of reliable stacked via in electronic substrates—vertical stiffness control method | Karan Kacker, Douglas O. Powell, David J. Russell, Sri M. Sri-Jayantha | 2014-10-21 |
| 8796133 | Optimization metallization for prevention of dielectric cracking under controlled collapse chip connections | Griselda Bonilla, Timothy H. Daubenspeck, Mark C. H. Lamorey, Howard S. Landis, Xiao Hu Liu +2 more | 2014-08-05 |
| 8759151 | Fixture to constrain laminate and method of assembly | Thomas E. Lombardi, Donald A. Merte, Gregg B. Monjeau, Son K. Tran | 2014-06-24 |
| 8756546 | Elastic modulus mapping of a chip carrier in a flip chip package | Erwin B. Cohen, Mark C. H. Lamorey, Marek A. Orlowski, Douglas O. Powell, David B. Stone +1 more | 2014-06-17 |
| 8659119 | Electronic components on trenched substrates and method of forming same | Vijayeshwar D. Kharma, Jennifer V. Muncy, Arun Sharma, Sri M. Sri-Jayantha, Lorenzo Valdevit | 2014-02-25 |
| 8637392 | Solder interconnect with non-wettable sidewall pillars and methods of manufacture | Charles L. Arvin, Raschid J. Bezama, Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy +3 more | 2014-01-28 |
| 8522430 | Clustered stacked vias for reliable electronic substrates | Karan Kacker, Douglas O. Powell, David J. Russell, Sri M. Sri-Jayantha | 2013-09-03 |
| 8508043 | Metal pad structure for thickness enhancement of polymer used in electrical interconnection of semiconductor die to semiconductor chip package substrate with solder bump | Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter, Timothy D. Sullivan | 2013-08-13 |