Issued Patents All Time
Showing 25 most recent of 40 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10685919 | Reduced-warpage laminate structure | Mark C. Lamorey, Shidong Li, Janak G. Patel, David J. Russell, Peter Slota, Jr. +1 more | 2020-06-16 |
| 9659131 | Copper feature design for warpage control of substrates | Edmund Blackshear, Anson J. Call, Vijayeshwar D. Khanna, David J. Russell | 2017-05-23 |
| 9613915 | Reduced-warpage laminate structure | Mark C. Lamorey, Shidong Li, Janak G. Patel, David J. Russell, Peter Slota, Jr. +1 more | 2017-04-04 |
| 9543255 | Reduced-warpage laminate structure | Mark C. Lamorey, Shidong Li, Janak G. Patel, David J. Russell, Peter Slota, Jr. +1 more | 2017-01-10 |
| 9484239 | Sacrificial carrier dicing of semiconductor wafers | Richard S. Graf, David J. Russell, David J. West | 2016-11-01 |
| 9478453 | Sacrificial carrier dicing of semiconductor wafers | Richard S. Graf, David J. Russell, David J. West | 2016-10-25 |
| 9105535 | Copper feature design for warpage control of substrates | Edmund Blackshear, Anson J. Call, Vijayeshwar D. Khanna, David J. Russell | 2015-08-11 |
| 9099458 | Construction of reliable stacked via in electronic substrates—vertical stiffness control method | Karan Kacker, David L. Questad, David J. Russell, Sri M. Sri-Jayantha | 2015-08-04 |
| 8866026 | Construction of reliable stacked via in electronic substrates—vertical stiffness control method | Karan Kacker, David L. Questad, David J. Russell, Sri M. Sri-Jayantha | 2014-10-21 |
| 8791372 | Reducing impedance discontinuity in packages | Paul M. Harvey, Wolfgang Sauter, Yaping Zhou | 2014-07-29 |
| 8756546 | Elastic modulus mapping of a chip carrier in a flip chip package | Erwin B. Cohen, Mark C. H. Lamorey, Marek A. Orlowski, David L. Questad, David B. Stone +1 more | 2014-06-17 |
| 8522430 | Clustered stacked vias for reliable electronic substrates | Karan Kacker, David L. Questad, David J. Russell, Sri M. Sri-Jayantha | 2013-09-03 |
| 8440917 | Method and apparatus to reduce impedance discontinuity in packages | Paul M. Harvey, Wolfgang Sauter, Yaping Zhou | 2013-05-14 |
| 8258410 | Construction of reliable stacked via in electronic substrates—vertical stiffness control method | Karan Kacker, David L. Questad, David J. Russell, Sri M. Sri-Jayantha | 2012-09-04 |
| 8242593 | Clustered stacked vias for reliable electronic substrates | Karan Kacker, David L. Questad, David J. Russell, Sri M. Sri-Jayantha | 2012-08-14 |
| 7981245 | Multi-layered interconnect structure using liquid crystalline polymer dielectric | Frank D. Egitto, Donald S. Farquhar, Voya R. Markovich, Mark D. Poliks | 2011-07-19 |
| 7786579 | Apparatus for crack prevention in integrated circuit packages | Jean Audet, Anson J. Call, Steven P. Ostrander, Roger D. Weekly | 2010-08-31 |
| 7777136 | Multi-layered interconnect structure using liquid crystalline polymer dielectric | Frank D. Egitto, Donald S. Farquhar, Voya R. Markovich, Mark D. Poliks | 2010-08-17 |
| 7301108 | Multi-layered interconnect structure using liquid crystalline polymer dielectric | Frank D. Egitto, Donald S. Farquhar, Voya R. Markovich, Mark D. Poliks | 2007-11-27 |
| 7253512 | Organic dielectric electronic interconnect structures and method for making | — | 2007-08-07 |
| 7128256 | Z-interconnections with liquid crystal polymer dielectric films | Donald S. Farquhar | 2006-10-31 |
| 7083901 | Joining member for Z-interconnect in electronic devices without conductive paste | Frank D. Egitto, Voya R. Markovich, Thomas R. Miller, James R. Wilcox | 2006-08-01 |
| 6955849 | Method and structure for small pitch z-axis electrical interconnections | Brian E. Curcio, Frank D. Egitto, Robert M. Japp, Thomas R. Miller, Manh-Quan Nguyen | 2005-10-18 |
| 6931723 | Organic dielectric electronic interconnect structures and method for making | — | 2005-08-23 |
| 6832436 | Method for forming a substructure of a multilayered laminate | Donald O. Anstrom, Bruce J. Chamberlin, James W. Fuller, John M. Lauffer, Voya R. Markovich +2 more | 2004-12-21 |