Issued Patents All Time
Showing 26–50 of 53 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7659616 | On-chip cooling systems for integrated circuits | Andres Fernando Munoz, Michael Sievers, Richard S. Wise | 2010-02-09 |
| 7659160 | Field effect transistors (FETS) with inverted source/drain metallic contacts, and method of fabrication same | Michael P. Belyansky, Dureseti Chidambarrao, Lawrence A. Clevenger, Carl Radens | 2010-02-09 |
| 7648871 | Field effect transistors (FETS) with inverted source/drain metallic contacts, and method of fabricating same | Michael P. Belyansky, Dureseti Chidambarrao, Lawrence A. Clevenger, Carl Radens | 2010-01-19 |
| 7629264 | Structure and method for hybrid tungsten copper metal contact | Griselda Bonilla, Lawrence A. Clevenger, Stephan Grunow, Kevin S. Petrarca, Roger A. Quon | 2009-12-08 |
| 7541277 | Stress relaxation, selective nitride phase removal | Kevin S. Petrarca, John Charles Petrus, Karl W. Barth | 2009-06-02 |
| 7494915 | Back end interconnect with a shaped interface | Lawrence A. Clevenger, Andrew P. Cowley, Timothy J. Dalton, Mark Hoinkis, Steffen K. Kaldor +8 more | 2009-02-24 |
| 7470616 | Damascene wiring fabrication methods incorporating dielectric cap etch process with hard mask retention | Hakeem S. B. Akinmade-Yusuff, Anthony D. Lisi | 2008-12-30 |
| 7456099 | Method of forming a structure for reducing lateral fringe capacitance in semiconductor devices | Lawrence A. Clevenger, Stephan Grunow, Kevin S. Petrarca, Vidhya Ramachandran, Theodorus E. Standaert | 2008-11-25 |
| 7396758 | Polycarbosilane buried etch stops in interconnect structures | Elbert E. Huang, Kelly Malone, Dirk Pfeiffer, Muthumanickam Sankarapandian, Christy S. Tyberg | 2008-07-08 |
| 7397081 | Sidewall semiconductor transistors | Huilong Zhu, Lawrence A. Clevenger, Omer H. Dokumaci, Carl Radens, Dureseti Chidambarrao | 2008-07-08 |
| 7358182 | Method of forming an interconnect structure | Heidi Baks, Shyng-Tsong Chen, Timothy J. Dalton, Nicholas Fuller | 2008-04-15 |
| 7338895 | Method for dual damascene integration of ultra low dielectric constant porous materials | Kelly Malone, Christy S. Tyberg | 2008-03-04 |
| 7253098 | Maintaining uniform CMP hard mask thickness | Shyng-Tsong Chen, Stephen E. Greco, Shom Ponoth, Terry A. Spooner, David L. Rath +1 more | 2007-08-07 |
| 7241696 | Method for depositing a metal layer on a semiconductor interconnect structure having a capping layer | Larry Clevenger, Timothy J. Dalton, Mark Hoinkis, Steffen K. Kaldor, Douglas C. La Tulipe, Jr. +5 more | 2007-07-10 |
| 7241681 | Bilayered metal hardmasks for use in dual damascene etch schemes | Lawrence A. Clevenger, Timothy J. Dalton, Douglas C. La Tulipe, Jr., Andy Cowley, Erdem Kaltalioglu +5 more | 2007-07-10 |
| 7224021 | MOSFET with high angle sidewall gate and contacts for reduced miller capacitance | Dureseti Chidambarrao, Lawrence A. Clevenger, Omer H. Dokumaci, Huilong Zhu | 2007-05-29 |
| 7187081 | Polycarbosilane buried etch stops in interconnect structures | Elbert E. Huang, Kelly Malone, Dirk Pfeiffer, Muthumanickam Sankarapandian, Christy S. Tyberg | 2007-03-06 |
| 7125792 | Dual damascene structure and method | Douglas C. La Tulipe, Jr., Timothy J. Dalton, Larry Clevenger, Andy Cowley, Erdem Kaltalioglu +1 more | 2006-10-24 |
| 7122462 | Back end interconnect with a shaped interface | Lawrence A. Clevenger, Andrew P. Cowley, Timothy J. Dalton, Mark Hoinkis, Steffen K. Kaldor +8 more | 2006-10-17 |
| 7091612 | Dual damascene structure and method | Timothy J. Dalton, Larry Clevenger, Andy Cowley, Douglas C. La Tulipe, Jr., Mark Hoinkis +5 more | 2006-08-15 |
| 7084479 | Line level air gaps | Shyng-Tsong Chen, Stefanie Chiras, Matthew E. Colburn, Timothy J. Dalton, Jeffrey Hedrick +9 more | 2006-08-01 |
| 7064064 | Copper recess process with application to selective capping and electroless plating | Shyng-Tsong Chen, Timothy J. Dalton, Kenneth M. Davis, Chao-Kun Hu, Fen F. Jamin +11 more | 2006-06-20 |
| 7057287 | Dual damascene integration of ultra low dielectric constant porous materials | Kelly Malone, Christy S. Tyberg | 2006-06-06 |
| 7052621 | Bilayered metal hardmasks for use in Dual Damascene etch schemes | Lawrence A. Clevenger, Timothy J. Dalton, Douglas C. La Tulipe, Jr., Andy Cowley, Erdem Kaltalioglu +5 more | 2006-05-30 |
| 7049209 | De-fluorination of wafer surface and related structure | Timothy J. Dalton, Nicholas Fuller, Catherine B. Labelle | 2006-05-23 |