Issued Patents All Time
Showing 76–100 of 130 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9871026 | Embedded memory and power management subpackage | John S. Guzek, Sasha N. Oster, Timothy McIntosh | 2018-01-16 |
| 9741692 | Methods to form high density through-mold interconnections | Omkar G. Karhade, Nitin A. Deshpande, Edvin Cetegen, Eric J. Li, Bassam M. Ziadeh | 2017-08-22 |
| 9721880 | Integrated circuit package structures | Jimin Yao, Sanka Ganesan, Shawna M. Liff, Yikang Deng | 2017-08-01 |
| 9711441 | Reduced PTH pad for enabling core routing and substrate layer count reduction | Mihir K. Roy | 2017-07-18 |
| 9691727 | Pad-less interconnect for electrical coreless substrate | Javier Soto Gonzalez, Charavana K. Gurumurthy, Robert M. Nickerson | 2017-06-27 |
| 9679843 | Localized high density substrate routing | Robert Starkston, John S. Guzek, Chia-Pin Chiu, Deepak Kulkarni, Ravindranath V. Mahajan | 2017-06-13 |
| 9570883 | Photonic package architecture | Edward A. Zarbock | 2017-02-14 |
| 9530758 | 3D integrated circuit package with through-mold first level interconnects | Robert L. Sankman | 2016-12-27 |
| 9526285 | Flexible computing fabric | Aleksandar Aleksov, Ravindranath V. Mahajan, Sairam Agraharam, Ian A. Young, John C. Johnson +1 more | 2016-12-27 |
| 9526175 | Suspended inductor microelectronic structures | Mathew J. Manusharow, Mihir K. Roy, Kaladhar Radhakrishnan, Edward A. Burton | 2016-12-20 |
| 9478476 | Package for a microelectronic die, microelectronic assembly containing same, microelectronic system, and method of reducing die stress in a microelectronic package | Sridhar Narasimhan, Mathew J. Manusharow, Thomas A. Boyd | 2016-10-25 |
| 9391013 | 3D integrated circuit package with window interposer | Ram Viswanath, Sriram Srinivasan, Mark Bohr, Andrew W. Yeoh, Sairam Agraharam | 2016-07-12 |
| 9355242 | Method and apparatus for managing and accessing personal data | Sasikanth Manipatruni, Kelin J. Kuhn, John C. Johnson | 2016-05-31 |
| 9287248 | Embedded memory and power management subpackage | John S. Guzek, Sasha N. Oster, Timothy McIntosh | 2016-03-15 |
| 9269701 | Localized high density substrate routing | Robert Starkston, John S. Guzek, Chia-Pin Chiu, Deepak Kulkarni, Ravi Mahajan | 2016-02-23 |
| 9210809 | Reduced PTH pad for enabling core routing and substrate layer count reduction | Mihir K. Roy | 2015-12-08 |
| 9183829 | Integrated accoustic phase array | Sasikanth Manipatruni, Kelin J. Kuhn, John C. Johnson | 2015-11-10 |
| 9136236 | Localized high density substrate routing | Robert Starkston, John S. Guzek, Chia-Pin Chiu, Deepak Kulkarni, Ravi Mahajan | 2015-09-15 |
| 9129958 | 3D integrated circuit package with window interposer | Ram Viswanath, Sriram Srinivasan, Mark Bohr, Andrew W. Yeoh, Sairam Agraharam | 2015-09-08 |
| 9099444 | 3D integrated circuit package with through-mold first level interconnects | Robert L. Sankman | 2015-08-04 |
| 9049807 | Processes of making pad-less interconnect for electrical coreless substrate | Javier Soto, Charan Gurumurthy, Robert M. Nickerson | 2015-06-02 |
| 8901748 | Direct external interconnect for embedded interconnect bridge package | Mathew J. Manusharow | 2014-12-02 |
| 8617990 | Reduced PTH pad for enabling core routing and substrate layer count reduction | Mihir K. Roy | 2013-12-31 |
| 7932596 | Thermally enhanced electronic flip-chip packaging with external-connector-side die and method | Robert L. Sankman | 2011-04-26 |
| 7867818 | Methods and apparatuses for providing stacked-die devices | Daewoong Suh | 2011-01-11 |