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USPTO Patent Rankings Data through Dec 31, 2025
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Deepak Kulkarni — 21 Patents

Intel: 20 patents #2,048 of 30,777Top 7%
AMD: 1 patents #9,083 of 9,280Top 100%
Chandler, AZ: #266 of 3,331 inventorsTop 8%
Arizona: #1,594 of 32,909 inventorsTop 5%
Overall (All Time): #201,324 of 4,157,543Top 5%
21 Patents All Time
Deepak Kulkarni has been granted 21 US patents while listed as an inventor at Intel. The first was granted in 2014 and the most recent in May 2025. Deepak Kulkarni ranks #201,324 of 4,157,543 US inventors in our database (top 4.8%). Patent records list Deepak Kulkarni in Chandler, AZ, US.

Issued Patents All Time

Showing 1–21 of 21 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12308329 Chiplet first architecture for die tiling applications Srinivas V. Pietambaram, Gang Duan, Rahul N. Manepalli, Xiaoying Guo 2025-05-20
12107042 Localized high density substrate routing Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Ravi Mahajan 2024-10-01 $20,560,000
12080632 Glass core package substrates Rahul Agarwal, Rajasekaran Swaminathan, Chintan Buch 2024-09-03 $326,917,000
11990427 Chiplet first architecture for die tiling applications Srinivas V. Pietambaram, Gang Duan, Rahul N. Manepalli, Xiaoying Guo 2024-05-21 $18,840,000
11984396 Localized high density substrate routing Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Ravi Mahajan 2024-05-14 $33,809,000
11973041 Chiplet first architecture for die tiling applications Srinivas V. Pietambaram, Gang Duan, Rahul N. Manepalli, Xiaoying Guo 2024-04-30 $26,151,000
11769735 Chiplet first architecture for die tiling applications Srinivas V. Pietambaram, Gang Duan, Rahul N. Manepalli, Xiaoying Guo 2023-09-26 $20,953,000
11515248 Localized high density substrate routing Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Ravi Mahajan 2022-11-29 $14,086,000
10796988 Localized high density substrate routing Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Ravi Mahajan 2020-10-06 $29,609,000
10453799 Logic die and other components embedded in build-up layers Russell K. Mortensen, John S. Guzek 2019-10-22 $16,310,000
10366951 Localized high density substrate routing Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Ravindranath V. Mahajan 2019-07-30 $29,864,000
9808875 Methods of fabricating low melting point solder reinforced sealant and structures formed thereby Carl Deppisch, Leonel Arana, Gregory S. Constable, Sriram Srinivasan 2017-11-07 $13,901,000
9679843 Localized high density substrate routing Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Ravindranath V. Mahajan 2017-06-13 $8,497,000
9601421 BBUL material integration in-plane with embedded die for warpage control Weng Hong Teh 2017-03-21 $8,001,000
9520376 Bumpless build-up layer package including an integrated heat spreader Weng Hong Teh, Chia-Pin Chiu, Tannaz Harirchian, John S. Guzek 2016-12-13 $15,488,000
9496211 Logic die and other components embedded in build-up layers Russell K. Mortensen, John S. Guzek 2016-11-15 $10,003,000
9269701 Localized high density substrate routing Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Ravi Mahajan 2016-02-23 $10,383,000
9254532 Methods of fabricating low melting point solder reinforced sealant and structures formed thereby Carl Deppisch, Leonel Arana, Gregory S. Constable, Sriram Srinivasan 2016-02-09 $15,927,000
9153552 Bumpless build-up layer package including an integrated heat spreader Weng Hong Teh, Chia-Pin Chiu, Tannaz Harirchian, John S. Guzek 2015-10-06 $14,030,000
9136236 Localized high density substrate routing Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Ravi Mahajan 2015-09-15 $17,844,000
8912670 Bumpless build-up layer package including an integrated heat spreader Weng Hong Teh, Chia-Pin Chiu, Tannaz Harirchian, John S. Guzek 2014-12-16 $19,599,000