DK

Deepak Kulkarni

IN Intel: 20 patents #2,022 of 30,777Top 7%
AM AMD: 1 patents #5,683 of 9,279Top 65%
Overall (All Time): #201,870 of 4,157,543Top 5%
21
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12308329 Chiplet first architecture for die tiling applications Srinivas V. Pietambaram, Gang Duan, Rahul N. Manepalli, Xiaoying Guo 2025-05-20
12107042 Localized high density substrate routing Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Ravi Mahajan 2024-10-01
12080632 Glass core package substrates Rahul Agarwal, Rajasekaran Swaminathan, Chintan Buch 2024-09-03
11990427 Chiplet first architecture for die tiling applications Srinivas V. Pietambaram, Gang Duan, Rahul N. Manepalli, Xiaoying Guo 2024-05-21
11984396 Localized high density substrate routing Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Ravi Mahajan 2024-05-14
11973041 Chiplet first architecture for die tiling applications Srinivas V. Pietambaram, Gang Duan, Rahul N. Manepalli, Xiaoying Guo 2024-04-30
11769735 Chiplet first architecture for die tiling applications Srinivas V. Pietambaram, Gang Duan, Rahul N. Manepalli, Xiaoying Guo 2023-09-26
11515248 Localized high density substrate routing Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Ravi Mahajan 2022-11-29
10796988 Localized high density substrate routing Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Ravi Mahajan 2020-10-06
10453799 Logic die and other components embedded in build-up layers Russell K. Mortensen, John S. Guzek 2019-10-22
10366951 Localized high density substrate routing Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Ravindranath V. Mahajan 2019-07-30
9808875 Methods of fabricating low melting point solder reinforced sealant and structures formed thereby Carl Deppisch, Leonel Arana, Gregory S. Constable, Sriram Srinivasan 2017-11-07
9679843 Localized high density substrate routing Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Ravindranath V. Mahajan 2017-06-13
9601421 BBUL material integration in-plane with embedded die for warpage control Weng Hong Teh 2017-03-21
9520376 Bumpless build-up layer package including an integrated heat spreader Weng Hong Teh, Chia-Pin Chiu, Tannaz Harirchian, John S. Guzek 2016-12-13
9496211 Logic die and other components embedded in build-up layers Russell K. Mortensen, John S. Guzek 2016-11-15
9269701 Localized high density substrate routing Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Ravi Mahajan 2016-02-23
9254532 Methods of fabricating low melting point solder reinforced sealant and structures formed thereby Carl Deppisch, Leonel Arana, Gregory S. Constable, Sriram Srinivasan 2016-02-09
9153552 Bumpless build-up layer package including an integrated heat spreader Weng Hong Teh, Chia-Pin Chiu, Tannaz Harirchian, John S. Guzek 2015-10-06
9136236 Localized high density substrate routing Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Ravi Mahajan 2015-09-15
8912670 Bumpless build-up layer package including an integrated heat spreader Weng Hong Teh, Chia-Pin Chiu, Tannaz Harirchian, John S. Guzek 2014-12-16