Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
RN

Robert M. Nickerson — 42 Patents

Intel: 42 patents #831 of 30,777Top 3%
Chandler, AZ: #90 of 3,331 inventorsTop 3%
Arizona: #593 of 32,909 inventorsTop 2%
Overall (All Time): #72,062 of 4,157,543Top 2%
42 Patents All Time
Robert M. Nickerson has been granted 42 US patents while listed as an inventor at Intel. The first was granted in 2004 and the most recent in November 2025. Robert M. Nickerson ranks #72,062 of 4,157,543 US inventors in our database (top 1.7%). Patent records list Robert M. Nickerson in Chandler, AZ, US.

Issued Patents All Time

Showing 1–25 of 42 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12476174 Ultra-thin, hyper-density semiconductor packages Debendra Mallik, Robert L. Sankman, Mitul Modi, Sanka Ganesan, Rajasekaran Swaminathan +4 more 2025-11-18
12417958 Microelectronics package comprising a package-on-package (PoP) architecture with inkjet barrier material for controlling bondline thickness and PoP adhesive keep out zone Elizabeth Nofen, Shripad Gokhale, Nick Ross, Amram Eitan, Nisha Ananthakrishnan +4 more 2025-09-16
12406906 Through mold interconnect drill feature Rees WINTERS, Purushotham Kaushik Muthur Srinath 2025-09-02
12406914 Ultra-thin, hyper-density semiconductor packages Debendra Mallik, Robert L. Sankman, Mitul Modi, Sanka Ganesan, Rajasekaran Swaminathan +4 more 2025-09-02
12394773 Laser ablation-based surface property modification and contamination removal Denis Myasishchev, Andrew V. Mazur, Purushotham Kaushik Muthur Srinath, Shripad Gokhale 2025-08-19
12362340 Laser ablation-based surface property modification and contamination removal Denis Myasishchev, Andrew V. Mazur, Purushotham Kaushik Muthur Srinath, Shripad Gokhale 2025-07-15
12347743 Microelectronics package comprising a package-on-package (PoP) architecture with inkjet barrier material for controlling bondline thickness and pop adhesive keep out zone Elizabeth Nofen, Shripad Gokhale, Nick Ross, Amram Eitan, Nisha Ananthakrishnan +4 more 2025-07-01
12315777 Microelectronics package comprising a package-on-package (POP) architecture with inkjet barrier material for controlling bondline thickness and POP adhesive keep out zone Elizabeth Nofen, Shripad Gokhale, Nick Ross, Amram Eitan, Nisha Ananthakrishnan +4 more 2025-05-27
12107082 Offset interposers for large-bottom packages and large-die package-on-package structures Russell K. Mortensen, Nicholas R. Watts 2024-10-01 $20,560,000
11978730 Offset interposers for large-bottom packages and large-die package-on-package structures Russell K. Mortensen, Nicholas R. Watts 2024-05-07 $26,756,000
11798932 Offset interposers for large-bottom packages and large-die package-on-package structures Russell K. Mortensen, Nicholas R. Watts 2023-10-24 $20,059,000
11705383 Through mold interconnect drill feature Rees WINTERS, Purushotham Kaushik Muthur Srinath 2023-07-18 $21,060,000
11462527 Micro-trenching mold interface in a pop package Kumar Abhishek Singh, Zhaozhi Li, Thomas J. Debonis, Rees WINTERS 2022-10-04 $13,460,000
11430724 Ultra-thin, hyper-density semiconductor packages Debendra Mallik, Robert L. Sankman, Mitul Modi, Sanka Ganesan, Rajasekaran Swaminathan +4 more 2022-08-30 $13,077,000
11222877 Thermally coupled package-on-package semiconductor packages Omkar G. Karhade, Robert L. Sankman, Nitin A. Deshpande, Mitul Modi, Thomas J. De Bonis +6 more 2022-01-11 $33,310,000
11056466 Package on package thermal transfer systems and methods Omkar G. Karhade, Christopher L. Rumer, Nitin A. Deshpande 2021-07-06 $31,309,000
10607976 Offset interposers for large-bottom packages and large-die package-on-package structures Russell K. Mortensen, Nicholas R. Watts 2020-03-31 $34,068,000
10446530 Offset interposers for large-bottom packages and large-die package-on-package structures Russell K. Mortensen, Nicholas R. Watts 2019-10-15 $18,012,000
10438930 Package on package thermal transfer systems and methods Omkar G. Karhade, Christopher L. Rumer, Nitin A. Deshpande 2019-10-08 $19,521,000
10231338 Methods of forming trenches in packages structures and structures formed thereby Naga Sivakumar Yagnamurthy, Huiyang Fei, Pramod Malatkar, Prasanna Raghavan 2019-03-12 $21,255,000
10128225 Interconnect structures with polymer core Sandeep Razdan, Edward R. Prack, Sairam Agraharam, Robert L. Sankman, Shan Zhong 2018-11-13 $26,640,000
10121722 Architecture material and process to improve thermal performance of the embedded die package Chandra Mohan Jha, Eric J. Li, Zhaozhi Li 2018-11-06 $18,970,000
9691727 Pad-less interconnect for electrical coreless substrate Javier Soto Gonzalez, Charavana K. Gurumurthy, Debendra Mallik 2017-06-27 $7,334,000
9691728 BBUL top side substrate layer enabling dual sided silicon interconnect and stacking flexibility Min Tao, John S. Guzek 2017-06-27 $7,334,000
9666549 Methods for solder for through-mold interconnect Chia-Pin Chiu, Xiaorong Xiong, Linda Zhang, Charles A. Gealer 2017-05-30 $12,187,000