Issued Patents All Time
Showing 151–175 of 212 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6429128 | Method of forming nitride capped Cu lines with reduced electromigration along the Cu/nitride interface | Minh Van Ngo, Larry Zhao | 2002-08-06 |
| 6413846 | Contact each methodology and integration scheme | Errol Todd Ryan, Frederick N. Hause, Frank Mauersberger, William S. Brennan, John A. Iacoponi +1 more | 2002-07-02 |
| 6406993 | Method of defining small openings in dielectric layers | Srikanteswara Dakshina-Murthy, Jonathan B. Smith, Eric M. Apelgren, Christian Zistl, Jeremy I. Martin +2 more | 2002-06-18 |
| 6392280 | Metal gate with PVD amorphous silicon layer for CMOS devices and method of making with a replacement gate process | Qi Xiang, Matthew S. Buynoski | 2002-05-21 |
| 6391750 | Method of selectively controlling contact resistance by controlling impurity concentration and silicide thickness | Susan H. Chen | 2002-05-21 |
| 6387767 | Nitrogen-rich silicon nitride sidewall spacer deposition | Minh Van Ngo, Christy Mei-Chu Woo, George Jonathan Kluth | 2002-05-14 |
| 6383906 | Method of forming junction-leakage free metal salicide in a semiconductor wafer with ultra-low silicon consumption | Karsten Wieczorek, Nicholas J. Kepler, Larry Wang | 2002-05-07 |
| 6383947 | Anti-reflective coating used in the fabrication of microcircuit structures in 0.18 micron and smaller technologies | Bhanwar Singh, Darrell M. Erb, Susan H. Chen, Carmen Morales | 2002-05-07 |
| 6380040 | Prevention of dopant out-diffusion during silicidation and junction formation | Nick Kepler, Karsten Wieczorek, Larry Wang | 2002-04-30 |
| 6380057 | Enhancement of nickel silicide formation by use of nickel pre-amorphizing implant | Matthew S. Buynoski, George Jonathan Kluth, Paul L. King | 2002-04-30 |
| 6376343 | Reduction of metal silicide/silicon interface roughness by dopant implantation processing | Matthew S. Buynoski, Qi Xiang | 2002-04-23 |
| 6372673 | Silicon-starved nitride spacer deposition | Minh Van Ngo, Christy Mei-Chu Woo, George Jonathan Kluth | 2002-04-16 |
| 6368950 | Silicide gate transistors | Qi Xiang, Matthew S. Buynoski, John Foster, Paul L. King, Eric N. Paton | 2002-04-09 |
| 6368967 | Method to control mechanical stress of copper interconnect line using post-plating copper anneal | — | 2002-04-09 |
| 6365516 | Advanced cobalt silicidation with in-situ hydrogen plasma clean | Austin Frenkel, Akif Sultan | 2002-04-02 |
| 6342414 | Damascene NiSi metal gate high-k transistor | Qi Xiang, Matthew S. Buynoski, John Foster, Paul L. King, Eric N. Paton | 2002-01-29 |
| 6333218 | Method of etching contacts with reduced oxide stress | Minh Van Ngo, Jayendra D. Bhakta | 2001-12-25 |
| 6329277 | Method of forming cobalt silicide | Bill Liu | 2001-12-11 |
| 6329718 | Method for reducing stress-induced voids for 0.25m.mu. and smaller semiconductor chip technology by annealing interconnect lines and using low bias voltage and low interlayer dielectric deposition rate and semiconductor chip made thereby | Minh Van Ngo, Matthew S. Buynoski, John Caffall, Nick Maccrae, Richard J. Huang +1 more | 2001-12-11 |
| 6319819 | Process for passivating top interface of damascene-type Cu interconnect lines | Darrell M. Erb | 2001-11-20 |
| 6315637 | Photoresist removal using a polishing tool | Eric M. Apelgren, Jonathan B. Smith | 2001-11-13 |
| 6313538 | Semiconductor device with partial passivation layer | Christian Zistl, Eric M. Apelgren, Nicholas J. Kepler, Srikanteswara Dakshina-Murthy | 2001-11-06 |
| 6300203 | Electrolytic deposition of dielectric precursor materials for use in in-laid gate MOS transistors | Matthew S. Buynoski, Qi Xang, Paul L. King, Eric N. Paton | 2001-10-09 |
| 6297148 | Method of forming a silicon bottom anti-reflective coating with reduced junction leakage during salicidation | Minh Van Ngo, Yowjuang Bill Liu | 2001-10-02 |
| 6297107 | High dielectric constant materials as gate dielectrics | Eric N. Paton, Matthew S. Byunoski, Paul L. King, Qi Xiang | 2001-10-02 |