Issued Patents All Time
Showing 176–200 of 212 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6294472 | Dual slurry particle sizes for reducing microscratching of wafers | Jonathan B. Smith, Jeremy I. Martin | 2001-09-25 |
| 6274511 | Method of forming junction-leakage free metal silicide in a semiconductor wafer by amorphization of refractory metal layer | Karsten Wieczorek, Nick Kepler | 2001-08-14 |
| 6268255 | Method of forming a semiconductor device with metal silicide regions | Christian Zistl, Nicholas J. Kepler | 2001-07-31 |
| 6261963 | Reverse electroplating of barrier metal layer to improve electromigration performance in copper interconnect devices | Larry Zhao, Eric M. Apelgren, Christian Zistl, Jonathan B. Smith | 2001-07-17 |
| 6258697 | Method of etching contacts with reduced oxide stress | Jayendra D. Bhakta, Minh Van Ngo | 2001-07-10 |
| 6258683 | Local interconnection arrangement with reduced junction leakage and method of forming same | Simon S. Chan, Yowjuang Bill Liu | 2001-07-10 |
| 6255214 | Method of forming junction-leakage free metal silicide in a semiconductor wafer by amorphization of source and drain regions | Karsten Wieczorek, Nick Kepler | 2001-07-03 |
| 6244210 | Strength coil for ionized copper plasma deposition | John A. Iacoponi | 2001-06-12 |
| 6239494 | Wire bonding CU interconnects | Robin Cheung | 2001-05-29 |
| 6238986 | Formation of junctions by diffusion from a doped film at silicidation | Nick Kepler, Karsten Wieczorek, Larry Wang | 2001-05-29 |
| 6228761 | Method of forming a local interconnect with improved etch selectivity of silicon dioxide/silicide | Minh Van Ngo | 2001-05-08 |
| 6225216 | Method of forming a local interconnect with improved etch selectivity of silicon dioxide/silicide | Minh Van Ngo, Yowjuang Bill Liu | 2001-05-01 |
| 6221794 | Method of reducing incidence of stress-induced voiding in semiconductor interconnect lines | Suzette K. Pangrle, Minh Van Ngo | 2001-04-24 |
| 6204177 | Method of forming junction leakage free metal silicide in a semiconductor wafer by alloying refractory metal | Nick Kepler, Karsten Wieczorek | 2001-03-20 |
| 6204136 | Post-spacer etch surface treatment for improved silicide formation | Simon S. Chan, Minh Van Ngo, Angela T. Hui | 2001-03-20 |
| 6201303 | Method of forming a local interconnect with improved etch selectivity of silicon dioxide/silicide | Minh Van Ngo, Yowjuang Bill Liu | 2001-03-13 |
| 6174743 | Method of reducing incidence of stress-induced voiding in semiconductor interconnect lines | Suzette K. Pangrle, Minh Van Ngo | 2001-01-16 |
| 6171947 | Method of reducing incidence of stress-induced voiding in semiconductor interconnect lines | Suzette K. Pangrle, Minh Van Ngo, Stephan K. Park, Susan Tovar | 2001-01-09 |
| 6171919 | MOS Transistor formation process including post-spacer etch surface treatment for improved silicide formation | Minh Van Ngo, Simon S. Chan, Angela T. Hui | 2001-01-09 |
| 6172421 | Semiconductor device having an intermetallic layer on metal interconnects | Shekhar Pramanick, Takeshi Nogami, Subhash Gupta | 2001-01-09 |
| 6169005 | Formation of junctions by diffusion from a doped amorphous silicon film during silicidation | Nick Kepler, Karsten Wieczorek, Larry Wang | 2001-01-02 |
| 6165903 | Method of forming ultra-shallow junctions in a semiconductor wafer with deposited silicon layer to reduce silicon consumption during salicidation | Nick Kepler, Karsten Wieczorek | 2000-12-26 |
| 6165855 | Antireflective coating used in the fabrication of microcircuit structures in 0.18 micron and smaller technologies | Bhanwar Singh, Darrell M. Erb, Susan H. Chen, Carmen Morales | 2000-12-26 |
| 6162689 | Multi-depth junction formation tailored to silicide formation | Nick Kepler, Karsten Wieczorek, Larry Wang | 2000-12-19 |
| 6150243 | Shallow junction formation by out-diffusion from a doped dielectric layer through a salicide layer | Karsten Wieczorek, Nick Kepler, Larry Wang | 2000-11-21 |