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USPTO Patent Rankings Data through Dec 31, 2025
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Nicholas J. Kepler — 16 Patents

AMD: 14 patents #842 of 9,280Top 10%
APAdvanced Microdevices Pvt: 1 patents #2 of 26Top 8%
Globalfoundries: 1 patents #2,221 of 4,424Top 55%
San Jose, CA: #4,110 of 32,062 inventorsTop 15%
California: #37,952 of 386,348 inventorsTop 10%
Overall (All Time): #284,196 of 4,157,543Top 7%
16 Patents All Time
Nicholas J. Kepler has been granted 16 US patents while listed as an inventor at AMD. The first was granted in 1998 and the most recent in June 2010. Nicholas J. Kepler ranks #284,196 of 4,157,543 US inventors in our database (top 6.8%). Patent records list Nicholas J. Kepler in San Jose, CA, US.

Issued Patents All Time

Showing 1–16 of 16 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
7737021 Resist trim process to define small openings in dielectric layers Srikanteswara Dakshina-Murthy, Paul R. Besser, Jonathan B. Smith, Eric M. Apelgren, Christian Zistl +2 more 2010-06-15 $14,576,000
7026691 Minimizing transistor size in integrated circuits Craig S. Sander, Rich Klein, Asim A. Selcuk, Christoper A. Spence, Raymond T. Lee +2 more 2006-04-11 $9,016,000
6600333 Method and test structure for characterizing sidewall damage in a semiconductor device Jeremy I. Martin, Larry Zhao 2003-07-29 $3,092,000
6500755 Resist trim process to define small openings in dielectric layers Srikanteswara Dakshina-Murthy, Paul R. Besser, Jonathan B. Smith, Eric M. Apelgren, Christian Zistl +2 more 2002-12-31 $2,157,000
6406993 Method of defining small openings in dielectric layers Srikanteswara Dakshina-Murthy, Paul R. Besser, Jonathan B. Smith, Eric M. Apelgren, Christian Zistl +2 more 2002-06-18 $3,499,000
6383906 Method of forming junction-leakage free metal salicide in a semiconductor wafer with ultra-low silicon consumption Karsten Wieczorek, Paul R. Besser, Larry Wang 2002-05-07 $2,110,000
6313538 Semiconductor device with partial passivation layer Christian Zistl, Paul R. Besser, Eric M. Apelgren, Srikanteswara Dakshina-Murthy 2001-11-06 $9,019,000
6287953 Minimizing transistor size in integrated circuits Craig S. Sander, Rich Klein, Asim A. Selcuk, Christoper A. Spence, Raymond T. Lee +2 more 2001-09-11
6268255 Method of forming a semiconductor device with metal silicide regions Paul R. Besser, Christian Zistl 2001-07-31 $5,560,000
6191034 Forming minimal size spaces in integrated circuit conductive lines Richard K. Klein, Asim A. Selcuk, Christopher A. Spence, Raymond T. Lee, John C. Holst +1 more 2001-02-20 $7,201,000
6146954 Minimizing transistor size in integrated circuits Richard K. Klein, Asim A. Selcuk, Craig S. Sander, Christopher A. Spence, Raymond T. Lee +2 more 2000-11-14 $4,365,000
6051881 Forming local interconnects in integrated circuits Richard K. Klein, Asim A. Selcuk, Craig S. Sander, Christopher A. Spence, Raymond T. Lee +2 more 2000-04-18 $8,077,000
6046088 Method for self-aligning polysilicon gates with field isolation and the resultant structure Richard K. Klein, Asim A. Selcuk, Craig S. Sander, Christopher A. Spence, Raymond T. Lee +2 more 2000-04-04 $6,962,000
5930659 Forming minimal size spaces in integrated circuit conductive lines Richard K. Klein, Asim A. Selcuk, Christopher A. Spence, Raymond T. Lee, John C. Holst +1 more 1999-07-27 $2,155,000
5844836 Memory cell having increased capacitance via a local interconnect to gate capacitor and a method for making such a cell Asim A. Selcuk, Richard K. Klein, Craig S. Sander, John C. Holst, Christopher A. Spence +2 more 1998-12-01 $5,030,000
5796651 Memory device using a reduced word line voltage during read operations and a method of accessing such a memory device Stephen C. Horne, Richard K. Klein, Asim A. Selcuk, Christopher A. Spence, Raymond T. Lee +1 more 1998-08-18 $2,496,000