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Resist trim process to define small openings in dielectric layers |
Srikanteswara Dakshina-Murthy, Paul R. Besser, Jonathan B. Smith, Eric M. Apelgren, Christian Zistl +2 more |
2010-06-15 |
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Minimizing transistor size in integrated circuits |
Craig S. Sander, Rich Klein, Asim A. Selcuk, Christoper A. Spence, Raymond T. Lee +2 more |
2006-04-11 |
| 6600333 |
Method and test structure for characterizing sidewall damage in a semiconductor device |
Jeremy I. Martin, Larry Zhao |
2003-07-29 |
| 6500755 |
Resist trim process to define small openings in dielectric layers |
Srikanteswara Dakshina-Murthy, Paul R. Besser, Jonathan B. Smith, Eric M. Apelgren, Christian Zistl +2 more |
2002-12-31 |
| 6406993 |
Method of defining small openings in dielectric layers |
Srikanteswara Dakshina-Murthy, Paul R. Besser, Jonathan B. Smith, Eric M. Apelgren, Christian Zistl +2 more |
2002-06-18 |
| 6383906 |
Method of forming junction-leakage free metal salicide in a semiconductor wafer with ultra-low silicon consumption |
Karsten Wieczorek, Paul R. Besser, Larry Wang |
2002-05-07 |
| 6313538 |
Semiconductor device with partial passivation layer |
Christian Zistl, Paul R. Besser, Eric M. Apelgren, Srikanteswara Dakshina-Murthy |
2001-11-06 |
| 6287953 |
Minimizing transistor size in integrated circuits |
Craig S. Sander, Rich Klein, Asim A. Selcuk, Christoper A. Spence, Raymond T. Lee +2 more |
2001-09-11 |
| 6268255 |
Method of forming a semiconductor device with metal silicide regions |
Paul R. Besser, Christian Zistl |
2001-07-31 |
| 6191034 |
Forming minimal size spaces in integrated circuit conductive lines |
Richard K. Klein, Asim A. Selcuk, Christopher A. Spence, Raymond T. Lee, John C. Holst +1 more |
2001-02-20 |
| 6146954 |
Minimizing transistor size in integrated circuits |
Richard K. Klein, Asim A. Selcuk, Craig S. Sander, Christopher A. Spence, Raymond T. Lee +2 more |
2000-11-14 |
| 6051881 |
Forming local interconnects in integrated circuits |
Richard K. Klein, Asim A. Selcuk, Craig S. Sander, Christopher A. Spence, Raymond T. Lee +2 more |
2000-04-18 |
| 6046088 |
Method for self-aligning polysilicon gates with field isolation and the resultant structure |
Richard K. Klein, Asim A. Selcuk, Craig S. Sander, Christopher A. Spence, Raymond T. Lee +2 more |
2000-04-04 |
| 5930659 |
Forming minimal size spaces in integrated circuit conductive lines |
Richard K. Klein, Asim A. Selcuk, Christopher A. Spence, Raymond T. Lee, John C. Holst +1 more |
1999-07-27 |
| 5844836 |
Memory cell having increased capacitance via a local interconnect to gate capacitor and a method for making such a cell |
Asim A. Selcuk, Richard K. Klein, Craig S. Sander, John C. Holst, Christopher A. Spence +2 more |
1998-12-01 |
| 5796651 |
Memory device using a reduced word line voltage during read operations and a method of accessing such a memory device |
Stephen C. Horne, Richard K. Klein, Asim A. Selcuk, Christopher A. Spence, Raymond T. Lee +1 more |
1998-08-18 |
