Issued Patents 2021
Showing 1–25 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11205603 | Semiconductor package and method manufacturing the same | Feng-Cheng Hsu | 2021-12-21 |
| 11205579 | Molding wafer chamber | Jing-Cheng Lin, Chin-Chuan Chang, Jui-Pin Hung, Szu-Wei Lu, Chen-Hua Yu | 2021-12-21 |
| 11189596 | Methods of forming multi-chip wafer level packages | Shuo-Mao Chen, Feng-Cheng Hsu, Han-Hsiang Huang, Hsien-Wen Liu, Hsiao-Wen Lee | 2021-11-30 |
| 11183473 | Integrated circuit structure having dies with connectors of different sizes | Chen-Hua Yu, Jing-Cheng Lin | 2021-11-23 |
| 11169207 | Testing of semiconductor chips with microbumps | Wei-Cheng Wu, Hsien-Pin Hu, Shang-Yun Hou, Chen-Hua Yu, Chao-Hsiang Yang | 2021-11-09 |
| 11164754 | Fan-out packages and methods of forming the same | Po-Hao Tsai, Ming-Chih Yew, Chia-Kuei Hsu, Po-Yao Chuang, Meng-Liang Lin +2 more | 2021-11-02 |
| 11152312 | Packages with interposers and methods for forming the same | Sao-Ling Chiu, Kuo-Ching Hsu, Wei-Cheng Wu, Ping-Kang Huang, Shang-Yun Hou +1 more | 2021-10-19 |
| 11152323 | Package with UBM and methods of forming | Chen-Hua Yu, Chien-Yu Li, Hung-Jui Kuo, Li-Hsien Huang, Hsien-Wei Chen +2 more | 2021-10-19 |
| 11133237 | Package with embedded heat dissipation features | Wensen Hung, Szu-Po Huang, Hsiang-Fan Lee, Kim Hong Chen, Chi-Hsi Wu | 2021-09-28 |
| 11114313 | Wafer level mold chase | Hsien-Wen Liu, Po-Hao Tsai, Yi-Wen Wu | 2021-09-07 |
| 11114311 | Chip package structure and method for forming the same | Po-Hao Tsai, Shih-Ting Hung, Techi Wong | 2021-09-07 |
| 11107801 | Multi fan-out package structure and method for forming the same | Po-Yao Lin, Shuo-Mao Chen, Feng-Cheng Hsu, Chia-Hsiang Lin | 2021-08-31 |
| 11101214 | Package structure with dam structure and method for forming the same | Po-Hao Tsai, Techi Wong, Meng-Liang Lin, Yi-Wen Wu, Po-Yao Chuang | 2021-08-24 |
| 11094625 | Semiconductor package with improved interposer structure | Yi-Wen Wu, Techi Wong, Po-Hao Tsai, Po-Yao Chuang, Shih-Ting Hung | 2021-08-17 |
| 11094646 | Methods of manufacturing an integrated circuit having stress tuning layer | Clinton Chao, Szu-Wei Lu | 2021-08-17 |
| 11081372 | Package system for integrated circuits | Wei-Cheng Wu, Shang-Yun Hou, Chen-Hua Yu | 2021-08-03 |
| 11075151 | Fan-out package with controllable standoff | Po-Hao Tsai, Techi Wong, Meng-Wei Chou, Meng-Liang Lin, Po-Yao Chuang | 2021-07-27 |
| 11075132 | Integrated fan-out package, package-on-package structure, and manufacturing method thereof | Hsien-Wen Liu, Shih-Ting Hung, Yi-Jou Lin, Tzu-Jui Fang, Po-Yao Chuang | 2021-07-27 |
| 11069656 | Three-layer package-on-package structure and method forming same | Jui-Pin Hung, Feng-Cheng Hsu | 2021-07-20 |
| 11069539 | 3D packages and methods for forming the same | Tzu-Wei Chiu, Cheng-Hsien Hsieh, Hsien-Pin Hu, Kuo-Ching Hsu, Shang-Yun Hou | 2021-07-20 |
| 11062997 | Method for forming chip package structure | Techi Wong, Po-Yao Lin, Ming-Chih Yew, Po-Hao Tsai, Po-Yao Chuang | 2021-07-13 |
| 11063023 | Semiconductor package | Feng-Cheng Hsu, Jui-Pin Hung | 2021-07-13 |
| 11063007 | Semiconductor device and method of manufacture | Po-Yao Chuang, Po-Hao Tsai | 2021-07-13 |
| 11056445 | Package structure with buffer layer sandwiched between encapsulation layer and semiconductor substrate | Hsiao-Wen Lee, Hsien-Wen Liu | 2021-07-06 |
| 11056464 | Packages with metal line crack prevention design | Chen-Hua Yu, Der-Chyang Yeh, Hsien-Wei Chen, Jie Chen | 2021-07-06 |