Issued Patents 2021
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11183399 | Semiconductor device and method of manufacture | Wen-Hsin Wei, Shang-Yun Hou, Chi-Hsi Wu, Chen-Hua Yu, Wen-Jung Chuang +6 more | 2021-11-23 |
| 11169207 | Testing of semiconductor chips with microbumps | Wei-Cheng Wu, Shang-Yun Hou, Shin-Puu Jeng, Chen-Hua Yu, Chao-Hsiang Yang | 2021-11-09 |
| 11101140 | Semiconductor device and method of manufacture | Wen-Hsin Wei, Shang-Yun Hou, Chi-Hsi Wu, Chen-Hua Yu, Wen-Jung Chuang +6 more | 2021-08-24 |
| 11101260 | Method of forming a dummy die of an integrated circuit having an embedded annular structure | Shang-Yun Hou, Sung-Hui Huang, Kuan-Yu Huang, Yushun Lin, Heh-Chang Huang +8 more | 2021-08-24 |
| 11088079 | Package structure having line connected via portions | Chih-Kai Cheng, Tsung-Shu Lin, Tsung-Yu Chen, Wen-Hsin Wei | 2021-08-10 |
| 11069657 | Chip package having die structures of different heights and method of forming same | Wen-Hsin Wei, Shang-Yun Hou | 2021-07-20 |
| 11069539 | 3D packages and methods for forming the same | Tzu-Wei Chiu, Cheng-Hsien Hsieh, Kuo-Ching Hsu, Shang-Yun Hou, Shin-Puu Jeng | 2021-07-20 |
| 11062971 | Package structure and method and equipment for forming the same | Wensen Hung, Tsung-Yu Chen, Tsung-Shu Lin, Chen-Hsiang Lao, Wen-Hsin Wei | 2021-07-13 |
| 10985137 | Stacked integrated circuit structure and method of forming | Wei-Ming Chen, Shang-Yun Hou, Wen-Hsin Wei | 2021-04-20 |
| 10964667 | Stacked integrated circuit structure and method of forming | Wei-Ming Chen, Shang-Yun Hou, Wen-Hsin Wei | 2021-03-30 |
| 10923431 | Method for forming a 3D IC architecture including forming a first die on a first side of a first interconnect structure and a second die in an opening formed in a second side | Chen-Hua Yu, Ming-Fa Chen, Jing-Cheng Lin, Jiun-Ren Lai, Yung-Chi Lin | 2021-02-16 |