Issued Patents 2021
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11189596 | Methods of forming multi-chip wafer level packages | Shuo-Mao Chen, Feng-Cheng Hsu, Han-Hsiang Huang, Shin-Puu Jeng, Hsiao-Wen Lee | 2021-11-30 |
| 11114313 | Wafer level mold chase | Po-Hao Tsai, Yi-Wen Wu, Shin-Puu Jeng | 2021-09-07 |
| 11081475 | Integrated circuit structure and method for reducing polymer layer delamination | Jing-Cheng Lin, Jui-Pin Hung, Min-Chen Lin | 2021-08-03 |
| 11075132 | Integrated fan-out package, package-on-package structure, and manufacturing method thereof | Shin-Puu Jeng, Shih-Ting Hung, Yi-Jou Lin, Tzu-Jui Fang, Po-Yao Chuang | 2021-07-27 |
| 11056445 | Package structure with buffer layer sandwiched between encapsulation layer and semiconductor substrate | Hsiao-Wen Lee, Shin-Puu Jeng | 2021-07-06 |