Issued Patents 2021
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11205579 | Molding wafer chamber | Jing-Cheng Lin, Chin-Chuan Chang, Szu-Wei Lu, Shin-Puu Jeng, Chen-Hua Yu | 2021-12-21 |
| 11158588 | Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices | Po-Hao Tsai, Jing-Cheng Lin | 2021-10-26 |
| 11158587 | Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices | Po-Hao Tsai, Jing-Cheng Lin | 2021-10-26 |
| 11081475 | Integrated circuit structure and method for reducing polymer layer delamination | Jing-Cheng Lin, Hsien-Wen Liu, Min-Chen Lin | 2021-08-03 |
| 11069656 | Three-layer package-on-package structure and method forming same | Feng-Cheng Hsu, Shin-Puu Jeng | 2021-07-20 |
| 11063023 | Semiconductor package | Feng-Cheng Hsu, Shin-Puu Jeng | 2021-07-13 |
| 11037861 | Interconnect structure for package-on-package devices | Jing-Cheng Lin, Po-Hao Tsai, Yi-Jou Lin, Shuo-Mao Chen, Chiung-Han Yeh +1 more | 2021-06-15 |
| 11018095 | Semiconductor structure | Chen-Hua Yu, Kuo-Chung Yee | 2021-05-25 |
| 10971483 | Semiconductor structure and manufacturing method thereof | Shin-Puu Jeng, Feng-Cheng Hsu | 2021-04-06 |
| 10964594 | Methods of packaging semiconductor devices including placing semiconductor devices into die caves | Jing-Cheng Lin, Yi-Hang Lin, Tsan-Hua Tung | 2021-03-30 |
| 10964666 | Chip on package structure and method | Chen-Hua Yu, Der-Chyang Yeh, Kuo-Chung Yee | 2021-03-30 |