Issued Patents All Time
Showing 201–225 of 355 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9117828 | Method of handling a thin wafer | Weng-Jin Wu, Ku-Feng Yang | 2015-08-25 |
| 9112007 | Through via structure and method | Yung-Chi Lin, Hsin-Yu Chen, Lin-Chih Huang, Tsang-Jiuh Wu | 2015-08-18 |
| 9099515 | Reconfigurable guide pin design for centering wafers having different sizes | Hsin Chang, Hsin-Yu Chen, Fang Wen Tsai, Jing-Cheng Lin, Shin-Puu Jeng +1 more | 2015-08-04 |
| 9093447 | Chip on wafer bonder | Chen-Hua Yu, Jui-Pin Hung, Weng-Jin Wu, Jean Wang | 2015-07-28 |
| 9093314 | Copper bump structures having sidewall protection layers | Jing-Cheng Lin, Ya-Hsi Hwung, Hsin-Yu Chen, Po-Hao Tsai, Yan-Fu Lin +2 more | 2015-07-28 |
| 9093489 | Selective curing method of adhesive on substrate | Tu-Hao Yu, Hung-Jung Tu, Yu-Liang Lin | 2015-07-28 |
| 9087878 | Device with through-silicon via (TSV) and method of forming the same | Chen-Hua Yu, Ebin Liao, Tsang-Jiuh Wu | 2015-07-21 |
| 9064850 | Through-substrate via formation with improved topography control | Yung-Chi Lin, Yi-Hsiu Chen, Ku-Feng Yang | 2015-06-23 |
| 9059262 | Integrated circuits including conductive structures through a substrate and methods of making the same | Yuan-Hung Liu, Ku-Feng Yang, Pei-Ching Kuo, Ming-Tsu Chung, Hsin-Yu Chen +1 more | 2015-06-16 |
| 9048231 | 3D packages and methods for forming the same | Shang-Yun Hou, Sao-Ling Chiu, Ping-Kang Huang, Wen-Hsin Wei, Shin-Puu Jeng +1 more | 2015-06-02 |
| 9023266 | Semiconductor molding chamber | Jing-Cheng Lin, Shin-Puu Jeng, Chen-Hua Yu | 2015-05-05 |
| 9006101 | Interconnect structure and method | Hsin-Yu Chen, Ku-Feng Yang, Tasi-Jung Wu, Lin-Chih Huang, Yuan-Hung Liu +1 more | 2015-04-14 |
| 8994188 | Interconnect structures for substrate | Chen-Hua Yu, Shin-Puu Jeng, Tsang-Jiuh Wu | 2015-03-31 |
| 8980741 | Through silicon via with embedded barrier pad | Yung-Chi Lin, Sylvia Lo, Jing-Cheng Lin, Yen-Hung Chen | 2015-03-17 |
| 8956966 | TSV structures and methods for forming the same | Yung-Chi Lin, Hsin-Yu Chen, Ku-Feng Yang, Tsang-Jiuh Wu, Jing-Cheng Lin | 2015-02-17 |
| 8952506 | Through silicon via structure | Chen-Hua Yu, Shin-Puu Jeng, Fang Wen Tsai, Chen-Yu Tsai | 2015-02-10 |
| 8951838 | Low cost and ultra-thin chip on wafer on substrate (CoWoS) formation | Hsin-Yu Chen, Lin-Chih Huang, Tasi-Jung Wu, Tsang-Jiuh Wu | 2015-02-10 |
| 8953336 | Surface metal wiring structure for an IC substrate | Chin-Fu Kao, Jing-Cheng Lin, Cheng-Lin Huang, Po-Hao Tsai | 2015-02-10 |
| 8928159 | Alignment marks in substrate having through-substrate via (TSV) | Hsin Chang, Fang Wen Tsai, Jing-Cheng Lin, Shin-Puu Jeng | 2015-01-06 |
| 8922004 | Copper bump structures having sidewall protection layers | Jing-Cheng Lin, Ya-Hsi Hwung, Hsin-Yu Chen, Po-Hao Tsai, Yan-Fu Lin +2 more | 2014-12-30 |
| 8900994 | Method for producing a protective structure | Chen-Hua Yu, Shin-Puu Jeng, Fang Wen Tsai, Chen-Yu Tsai | 2014-12-02 |
| 8896127 | Via structure and via etching process of forming the same | Hung-Pin Chang, Chen-Hua Yu | 2014-11-25 |
| 8896136 | Alignment mark and method of formation | Chen-Yu Tsai, Shih-Hui Wang, Chien-Ming Chiu, Chia-Ho Chen, Fang Wen Tsai +4 more | 2014-11-25 |
| 8878338 | Capacitor for interposers and methods of manufacture thereof | Chun Hua Chang, Der-Chyang Yeh, Kuang-Wei Cheng, Yuan-Hung Liu, Shang-Yun Hou +1 more | 2014-11-04 |
| 8878252 | III-V compound semiconductor epitaxy from a non-III-V substrate | Chia-Lin Yu, Chen-Hua Yu, Ding-Yuan Chen | 2014-11-04 |