Issued Patents All Time
Showing 101–125 of 229 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11088110 | Semiconductor device, circuit board structure and manufacturing method thereof | Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Yu-Chia Lai, Po-Yuan Teng | 2021-08-10 |
| 11062975 | Package structures | Yu-Chia Lai, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Kuo-Chung Yee | 2021-07-13 |
| 11049805 | Semiconductor package and method | Kuo Lung Pan, Shu-Rong Chun, Teng-Yuan Lo, Hung-Yi Kuo, Chih-Horng Chang +1 more | 2021-06-29 |
| 11043462 | Solderless interconnection structure and method of forming same | Yu-Wei Lin, Sheng-Yu Wu, Yu-Jen Tseng, Chen-Shien Chen | 2021-06-22 |
| 11011460 | Package structure, package-on-package structure and manufacturing method thereof | Chuei-Tang Wang | 2021-05-18 |
| 11004827 | Semiconductor package and manufacturing method of semiconductor package | Wei-Kang Hsieh, Hung-Yi Kuo, Hao-Yi Tsai, Kuo Lung Pan, Yu-Chia Lai +3 more | 2021-05-11 |
| 11004803 | Dummy dies for reducing warpage in packages | Chen-Hua Yu, Hao-Yi Tsai, Chung-Shi Liu | 2021-05-11 |
| 11004758 | Integrated circuit package and method | Shu-Rong Chun, Kuo Lung Pan, Hao-Yi Tsai, Pei-Hsuan Lee, Chien Ling Hwang +3 more | 2021-05-11 |
| 10985115 | Semiconductor package and manufacturing method thereof | Po-Yuan Teng, Hao-Yi Tsai, Ching-Yao Lin, Teng-Yuan Lo, Chih-Yu Wang | 2021-04-20 |
| 10985114 | Scheme for connector site spacing and resulting structures | Yu-Feng Chen, Yen-Liang Lin, Sheng-Yu Wu, Chen-Shien Chen | 2021-04-20 |
| 10985101 | Semiconductor package and manufacturing method thereof | Yu-Chia Lai, Chi-Hui Lai, Hao-Yi Tsai, Chung-Shi Liu, Kuo-Chung Yee +1 more | 2021-04-20 |
| 10978363 | Semiconductor structure with conductive structure | Pei-Chun Tsai, Wei Sen Chang, Hao-Yi Tsai | 2021-04-13 |
| 10978362 | Semiconductor structure with conductive structure | Pei-Chun Tsai, Wei Sen Chang, Hao-Yi Tsai | 2021-04-13 |
| 10978382 | Integrated circuit package and method | Chi-Hui Lai, Shu-Rong Chun, Kuo Lung Pan, Hao-Yi Tsai, Chung-Shi Liu +1 more | 2021-04-13 |
| 10971477 | Semiconductor packages and methods of forming the same | Chen-Hua Yu, Ming Hung Tseng, Yen-Liang Lin, Tzu-Sung Huang, Hao-Yi Tsai | 2021-04-06 |
| 10861823 | Dual-sided integrated fan-out package | Kuo Lung Pan, Wei Sen Chang, Hao-Yi Tsai, Chung-Shi Liu | 2020-12-08 |
| 10847505 | Multi-chip semiconductor package | Yu-Chia Lai, Kuo Lung Pan, Hung-Yi Kuo, Hao-Yi Tsai, Chung-Shi Liu +1 more | 2020-11-24 |
| 10840111 | Chip package with fan-out structure | Shing-Chao Chen, Chih-Wei Lin, Meng-Tse Chen, Hui-Min Huang, Ming-Da Cheng +3 more | 2020-11-17 |
| 10833033 | Bump structure having a side recess and semiconductor structure including the same | Chih-Horng Chang, Chen-Shien Chen, Yen-Liang Lin | 2020-11-10 |
| 10825696 | Cross-wafer RDLs in constructed wafers | Chen-Hua Yu | 2020-11-03 |
| 10811338 | Surface treatment method and apparatus for semiconductor packaging | Chih-Horng Chang, Jie Deng, Ying-Yu Chen | 2020-10-20 |
| 10811384 | Semiconductor package and method of manufacturing the same | Shih-Wei Chen, Chih-Hua Chen, Hsin-Yu Pan, Hao-Yi Tsai, Lipu Kris Chuang | 2020-10-20 |
| 10797008 | Semiconductor package and manufacturing method thereof | Po-Yuan Teng, Hao-Yi Tsai, Ching-Yao Lin, Teng-Yuan Lo, Chih-Yu Wang | 2020-10-06 |
| 10790269 | Semiconductor devices and semiconductor structures | Chi-Hui Lai, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai | 2020-09-29 |
| 10784203 | Semiconductor package and method | Tzu-Sung Huang, Hsiu-Jen Lin, Hao-Yi Tsai, Ming Hung Tseng, Tsung-Hsien Chiang +1 more | 2020-09-22 |