Issued Patents All Time
Showing 226–250 of 370 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9478474 | Methods and apparatus for forming package-on-packages | Hsu-Hsien Chen, Chih-Hua Chen, En-Hsiang Yeh, Monsen Liu | 2016-10-25 |
| 9472521 | Scheme for connector site spacing and resulting structures | Yao-Chun Chuang, Chita Chuang, Hao-Juin Liu, Chen-Cheng Kuo | 2016-10-18 |
| 9472525 | Bump-on-trace structures with high assembly yield | Chih-Fan Huang, Chung-Shi Liu, Ming-Da Cheng, Tin-Hao Kuo, Yi-Teh Chou | 2016-10-18 |
| 9449941 | Connecting function chips to a package to form package-on-package | Pei-Chun Tsai, Sheng-Yu Wu, Ching-Wen Hsiao, Tin-Hao Kuo, Chung-Shi Liu +2 more | 2016-09-20 |
| 9431351 | Semiconductor package and manufacturing method of the same | Guan-Yu Chen, Yu-Wei Lin, Tin-Hao Kuo | 2016-08-30 |
| 9425136 | Conical-shaped or tier-shaped pillar connections | Tin-Hao Kuo, Mirng-Ji Lii, Chen-Hua Yu, Sheng-Yu Wu, Yao-Chun Chuang | 2016-08-23 |
| 9425117 | Substrate design with balanced metal and solder resist density | Yu-Wei Lin, Guan-Yu Chen, Yu-Min Liang, Tin-Hao Kuo | 2016-08-23 |
| 9425157 | Substrate and package structure | Wei-Hung Lin, Hsiu-Jen Lin, Ming-Da Cheng, Yu-Min Liang, Chung-Shi Liu | 2016-08-23 |
| 9418969 | Packaged semiconductor devices and packaging methods | Yen-Chang Hu, Ching-Wen Hsiao | 2016-08-16 |
| 9406629 | Semiconductor package structure and manufacturing method thereof | Hua-Wei Tseng, Shang-Yun Tu, Hsu-Hsien Chen, Hao-Juin Liu, Ming Hung Tseng +1 more | 2016-08-02 |
| 9397059 | Bonded structures for package and substrate | Ming-Hong Cha, Chen-Cheng Kuo, Tsung-Hsien Chiang, Hao-Juin Liu, Yao-Chun Chuang +1 more | 2016-07-19 |
| 9379078 | 3D die stacking structure with fine pitches | Chen-Hua Yu, Yen-Chang Hu | 2016-06-28 |
| 9379032 | Semiconductor packaging having warpage control and methods of forming same | Yu-Chih Huang, Chun-Cheng Lin, Kuei-Wei Huang, Yu-Feng Chen | 2016-06-28 |
| 9373598 | Connector structures of integrated circuits | Shang-Yun Tu, Yao-Chun Chuang, Ming Hung Tseng, Chen-Cheng Kuo | 2016-06-21 |
| 9368460 | Fan-out interconnect structure and method for forming same | Chen-Hua Yu, Yen-Chang Hu, Ching-Wen Hsiao, Mirng-Ji Lii, Chung-Shi Liu +2 more | 2016-06-14 |
| 9355933 | Cooling channels in 3DIC stacks | Kai-Ming Ching, Ching-Wen Hsiao, Tsung-Ding Wang, Ming Hung Tseng | 2016-05-31 |
| 9349699 | Front side copper post joint structure for temporary bond in TSV application | Hon-Lin Huang, Ching-Wen Hsiao, Kuo-Ching Hsu | 2016-05-24 |
| 9343442 | Passive devices in package-on-package structures and methods for forming the same | Chih-Hua Chen | 2016-05-17 |
| 9330947 | Methods for forming package-on-package structures having buffer dams | Shou-Cheng Hu, Ching-Wen Hsiao | 2016-05-03 |
| 9318458 | Bump structure having a side recess and semiconductor structure including the same | Chih-Horng Chang, Tin-Hao Kuo, Yen-Liang Lin | 2016-04-19 |
| 9312230 | Conductive pillar structure for semiconductor substrate and method of manufacture | Chih-Hua Chen, Chen-Cheng Kuo | 2016-04-12 |
| 9312225 | Bump structure for stacked dies | Hung-Pin Chang, Kuo-Ching Hsu, Wen-Chih Chiou, Chen-Hua Yu | 2016-04-12 |
| 9299674 | Bump-on-trace interconnect | Chen-Hua Yu | 2016-03-29 |
| 9293449 | Methods and apparatus for package on package devices with reversed stud bump through via interconnections | Shou-Cheng Hu, Tin-Hao Kuo, Chih-Hua Chen, Ching-Wen Hsiao | 2016-03-22 |
| 9287234 | Dummy flip chip bumps for reducing stress | Sheng-Yu Wu, Tin-Hao Kuo, Chita Chuang | 2016-03-15 |