Issued Patents All Time
Showing 26–50 of 66 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11387224 | Phase change material in substrate cavity | Cheng Xu, Zhimin Wan, Yikang Deng, Junnan Zhao, Chong Zhang +2 more | 2022-07-12 |
| 11380609 | Microelectronic assemblies having conductive structures with different thicknesses on a core substrate | Cheng Xu, Jiwei Sun, Ji-Yong Park, Yikang Deng, Zhichao Zhang +2 more | 2022-07-05 |
| 11355459 | Embedding magnetic material, in a cored or coreless semiconductor package | Sai Vadlamani, Rahul Jain, Junnan Zhao, Ji-Yong Park, Cheng Xu +1 more | 2022-06-07 |
| 11322290 | Techniques for an inductor at a first level interface | Cheng Xu, Yikang Deng, Ji-Yong Park, Srinivas V. Pietambaram, Ying Wang +3 more | 2022-05-03 |
| 11276634 | High density package substrate formed with dielectric bi-layer | Srinivas V. Pietambaram, Rahul N. Manepalli, David Unruh, Frank Truong, Junnan Zhao +1 more | 2022-03-15 |
| 11251113 | Methods of embedding magnetic structures in substrates | Sai Vadlamani, Prithwish Chatterjee, Robert Alan May, Rahul Jain, Lauren A. Link +2 more | 2022-02-15 |
| 11244912 | Semiconductor package having a coaxial first layer interconnect | Sai Vadlamani, Aleksandar Aleksov, Rahul Jain, Kristof Darmawikarta, Robert Alan May +2 more | 2022-02-08 |
| 11217534 | Galvanic corrosion protection for semiconductor packages | Cheng Xu, Junnan Zhao, Ji-Yong Park | 2022-01-04 |
| 11158558 | Package with underfill containment barrier | Rahul Jain, Siddharth K. Alur, Wei-Lun Kane Jen, Vipul V. Mehta, Ashish Dhall +4 more | 2021-10-26 |
| 11139264 | Die interconnect substrates, a semiconductor device and a method for forming a die interconnect substrate | Rahul Jain, Ji-Yong Park | 2021-10-05 |
| 11031360 | Techniques for an inductor at a second level interface | Cheng Xu, Yikang Deng, Ji-Yong Park, Srinivas V. Pietambaram, Ying Wang +3 more | 2021-06-08 |
| 10971492 | Package-embedded thin-film capacitors, package-integral magnetic inductors, and methods of assembling same | Cheng Xu, Rahul Jain, Seo Young Kim, Ji-Yong Park, Sai Vadlamani +1 more | 2021-04-06 |
| 10957667 | Indium solder metallurgy to control electro-migration | Yi Li, Yueli Liu | 2021-03-23 |
| 10777514 | Techniques for an inductor at a second level interface | Cheng Xu, Yikang Deng, Ji-Yong Park, Srinivas V. Pietambaram, Ying Wang +3 more | 2020-09-15 |
| 10692847 | Inorganic interposer for multi-chip packaging | Daniel N. Sobieski, Kristof Darmawikarta, Sri Ranga Sai Boyapati, Merve Celikkol, Kemal Aygun +1 more | 2020-06-23 |
| 10643994 | Package-embedded thin-film capacitors, package-integral magnetic inductors, and methods of assembling same | Cheng Xu, Rahul Jain, Seo Young Kim, Ji-Yong Park, Sai Vadlamani +1 more | 2020-05-05 |
| 10468374 | Die interconnect substrates, a semiconductor device and a method for forming a die interconnect substrate | Rahul Jain, Ji-Yong Park | 2019-11-05 |
| 10468352 | Semiconductor packages with embedded bridge interconnects | — | 2019-11-05 |
| 10446500 | Semiconductor packages with embedded bridge interconnects | — | 2019-10-15 |
| 10424561 | Integrated circuit structures with recessed conductive contacts for package on package | Islam A. Salama, Ram Viswanath, Robert L. Sankman, Babak Sabi, Sri Chaitra Jyotsna Chavali | 2019-09-24 |
| 10384431 | Methods for forming a substrate structure for an electrical component and an apparatus for applying pressure to an electrically insulating laminate located on a core substrate | Ji-Yong Park, Sri Chaitra Jyotsna Chavali, Siddharth K. Alur | 2019-08-20 |
| 10373951 | Package-embedded thin-film capacitors, package-integral magnetic inductors, and methods of assembling same | Cheng Xu, Rahul Jain, Seo Young Kim, Ji-Yong Park, Sai Vadlamani +1 more | 2019-08-06 |
| 10373900 | Tin-zinc microbump structures and method of making same | Sri Chaitra Jyotsna Chavali, Amanda E. Schuckman | 2019-08-06 |
| 10297563 | Copper seed layer and nickel-tin microbump structures | Rahul Jain, Amanda E. Schuckman, Steve Cho | 2019-05-21 |
| 10121752 | Surface finishes for interconnection pads in microelectronic structures | Srinivas V. Pietambaram | 2018-11-06 |