Issued Patents All Time
Showing 101–125 of 204 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9786554 | Self aligned conductive lines | Sean D. Burns, Lawrence A. Clevenger, Anuja E. DeSilva, Nelson Felix, Yann Mignot +3 more | 2017-10-10 |
| 9779944 | Method and structure for cut material selection | Sean D. Burns, Lawrence A. Clevenger, Matthew E. Colburn, Nelson Felix, Yann Mignot +3 more | 2017-10-03 |
| 9773700 | Aligning conductive vias with trenches | Sean D. Burns, Lawrence A. Clevenger, Matthew E. Colburn, Yann Mignot, Christopher J. Penny +2 more | 2017-09-26 |
| 9773893 | Forming a sacrificial liner for dual channel devices | Huiming Bu, Kangguo Cheng, Dechao Guo, Peng Xu | 2017-09-26 |
| 9761455 | Material removal process for self-aligned contacts | Ahmet S. Ozcan | 2017-09-12 |
| 9754798 | Hybridization fin reveal for uniform fin reveal depth across different fin pitches | Zhenxing Bi, Donald F. Canaperi, Thamarai S. Devarajan, Fee Li Lie, Peng Xu | 2017-09-05 |
| 9741823 | Fin cut during replacement gate formation | Andrew M. Greene, Balasubramanian Pranatharthiharan, John R. Sporre | 2017-08-22 |
| 9741856 | Stress retention in fins of fin field-effect transistors | Gauri Karve, Juntao Li, Fee Li Lie, Stuart A. Sieg, John R. Sporre | 2017-08-22 |
| 9728462 | Stable multiple threshold voltage devices on replacement metal gate CMOS devices | Su Chen Fan, Injo Ok, Tenko Yamashita | 2017-08-08 |
| 9721848 | Cutting fins and gates in CMOS devices | Huiming Bu, Kangguo Cheng, Andrew M. Greene, Dechao Guo, Gauri Karve +6 more | 2017-08-01 |
| 9716184 | Enabling large feature alignment marks with sidewall image transfer patterning | Kangguo Cheng, Fee Li Lie, Eric R. Miller, Jeffrey C. Shearer, John R. Sporre +1 more | 2017-07-25 |
| 9704860 | Epitaxial oxide fin segments to prevent strained semiconductor fin end relaxation | Karthik Balakrishnan, Keith E. Fogel, Alexander Reznicek | 2017-07-11 |
| 9673199 | Gate cutting for a vertical transistor device | Brent A. Anderson, Stuart A. Sieg, John R. Sporre, Junli Wang | 2017-06-06 |
| 9653573 | Replacement metal gate including dielectric gate material | Linus Jang, Sanjay C. Mehta, Soon-Cheon Seo, Raghavasimhan Sreenivasan | 2017-05-16 |
| 9640640 | FinFET device with channel strain | Bruce B. Doris, Hong He, Gauri Karve, Fee Li Lie | 2017-05-02 |
| 9634009 | System and method for source-drain extension in FinFETs | Atsuro Inada | 2017-04-25 |
| 9627510 | Structure and method for replacement gate integration with self-aligned contacts | Hemanth Jagannathan | 2017-04-18 |
| 9607886 | Self aligned conductive lines with relaxed overlay | Sean D. Burns, Lawrence A. Clevenger, Matthew E. Colburn, Yann Mignot, Christopher J. Penny +2 more | 2017-03-28 |
| 9589958 | Pitch scalable active area patterning structure and process for multi-channel finFET technologies | Fee Li Lie, Eric R. Miller, Stuart A. Sieg | 2017-03-07 |
| 9589850 | Method for controlled recessing of materials in cavities in IC devices | Chanro Park, Kisup Chung | 2017-03-07 |
| 9589845 | Fin cut enabling single diffusion breaks | Hemanth Jagannathan, Vamsi K. Paruchuri, Alexander Reznicek | 2017-03-07 |
| 9583563 | Conformal doping for punch through stopper in fin field effect transistor devices | Huiming Bu, Fee Li Lie, Tenko Yamashita | 2017-02-28 |
| 9576979 | Preventing strained fin relaxation by sealing fin ends | Kangguo Cheng, Bruce B. Doris, Hong He, Gauri Karve, Juntao Li +3 more | 2017-02-21 |
| 9576096 | Semiconductor structures including an integrated finFET with deep trench capacitor and methods of manufacture | Kevin K. Chan, Babar A. Khan, Masaharu Kobayashi, Effendi Leobandung, Theodorus E. Standaert +1 more | 2017-02-21 |
| 9564438 | Semiconductor structure containing semiconductor fins and insulating fence fins on a same substrate | — | 2017-02-07 |