Issued Patents All Time
Showing 76–100 of 204 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10042968 | Semiconductor structures with deep trench capacitor and methods of manufacture | Kevin K. Chan, Babar A. Khan, Masaharu Kobayashi, Effendi Leobandung, Theodorus E. Standaert +1 more | 2018-08-07 |
| 10032680 | Strained finFET device fabrication | Bruce B. Doris, Hong He, Gauri Karve, Fee Li Lie, Stuart A. Sieg | 2018-07-24 |
| 9997419 | Confined eptaxial growth for continued pitch scaling | Balasubramanian Pranatharthiharan | 2018-06-12 |
| 9991156 | Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs | Sean D. Burns, Lawrence A. Clevenger, Matthew E. Colburn, Yann Mignot, Christopher J. Penny +2 more | 2018-06-05 |
| 9985109 | FinFET with reduced parasitic capacitance | Emre Alptekin, Veeraraghavan S. Basker | 2018-05-29 |
| 9985027 | Stable multiple threshold voltage devices on replacement metal gate CMOS devices | Su Chen Fan, Injo Ok, Tenko Yamashita | 2018-05-29 |
| 9978748 | Method of cutting fins to create diffusion breaks for finFETs | Hemanth Jagannathan, Alexander Reznicek | 2018-05-22 |
| 9972533 | Aligning conductive vias with trenches | Sean D. Burns, Lawrence A. Clevenger, Matthew E. Colburn, Yann Mignot, Christopher J. Penny +2 more | 2018-05-15 |
| 9941142 | Tunable TiOxNy hardmask for multilayer patterning | Abraham Arceo de la Pena, Ekmini Anuja De Silva, Nelson Felix | 2018-04-10 |
| 9934970 | Self aligned pattern formation post spacer etchback in tight pitch configurations | Sean D. Burns, Lawrence A. Clevenger, Matthew E. Colburn, Nelson Felix, Christopher J. Penny +2 more | 2018-04-03 |
| 9935015 | Hybridization fin reveal for uniform fin reveal depth across different fin pitches | Zhenxing Bi, Donald F. Canaperi, Thamarai S. Devarajan, Fee Li Lie, Peng Xu | 2018-04-03 |
| 9929016 | Material removal process for self-aligned contacts | Ahmet S. Ozcan | 2018-03-27 |
| 9917019 | Strained FinFET device fabrication | Bruce B. Doris, Hong He, Gauri Karve, Fee Li Lie, Stuart A. Sieg | 2018-03-13 |
| 9911647 | Self aligned conductive lines | Sean D. Burns, Lawrence A. Clevenger, Anuja E. DeSilva, Nelson Felix, Yann Mignot +3 more | 2018-03-06 |
| 9905665 | Replacement metal gate stack for diffusion prevention | Takashi Ando, Johnathan E. Faltermeier, Su Chen Fan, Injo Ok, Tenko Yamashita | 2018-02-27 |
| 9882048 | Gate cut on a vertical field effect transistor with a defined-width inorganic mask | Brent A. Anderson, Jeffrey C. Shearer, Stuart A. Sieg, John R. Sporre, Junli Wang | 2018-01-30 |
| 9881937 | Preventing strained fin relaxation | Kangguo Cheng, Bruce B. Doris, Hong He, Gauri Karve, Juntao Li +3 more | 2018-01-30 |
| 9881926 | Static random access memory (SRAM) density scaling by using middle of line (MOL) flow | Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert, Junli Wang | 2018-01-30 |
| 9876074 | Structure and process to tuck fin tips self-aligned to gates | Bruce B. Doris, Hong He, Gauri Karve, Fee Li Lie, Derrick Liu +2 more | 2018-01-23 |
| 9859224 | Registration mark formation during sidewall image transfer process | David J. Conklin, Allen H. Gabor, Byeong Y. Kim, Fee Li Lie, Stuart A. Sieg | 2018-01-02 |
| 9852946 | Self aligned conductive lines | Sean D. Burns, Lawrence A. Clevenger, Matthew E. Colburn, Yann Mignot, Christopher J. Penny +2 more | 2017-12-26 |
| 9842737 | Self-aligned quadruple patterning process | Matthew E. Colburn, Fee Li Lie, Stuart A. Sieg | 2017-12-12 |
| 9805991 | Strained finFET device fabrication | Bruce B. Doris, Hong He, Gauri Karve, Fee Li Lie, Stuart A. Sieg | 2017-10-31 |
| 9805992 | Strained finFET device fabrication | Bruce B. Doris, Hong He, Gauri Karve, Fee Li Lie, Stuart A. Sieg | 2017-10-31 |
| 9799534 | Application of titanium-oxide as a patterning hardmask | Abraham Arceo de la Pena, Ekmini Anuja De Silva, Nelson Felix, Indira Seshadri | 2017-10-24 |