Issued Patents All Time
Showing 126–150 of 204 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9548379 | Asymmetric multi-gate FinFET | Veeraraghavan S. Basker, Andres Bryant, Huiming Bu, Tenko Yamashita | 2017-01-17 |
| 9543435 | Asymmetric multi-gate finFET | Veeraraghavan S. Basker, Andres Bryant, Huiming Bu, Tenko Yamashita | 2017-01-10 |
| 9536744 | Enabling large feature alignment marks with sidewall image transfer patterning | Kangguo Cheng, Fee Li Lie, Eric R. Miller, Jeffrey C. Shearer, John R. Sporre +1 more | 2017-01-03 |
| 9536791 | Stable multiple threshold voltage devices on replacement metal gate CMOS devices | Su Chen Fan, Injo Ok, Tenko Yamashita | 2017-01-03 |
| 9515141 | FinFET device with channel strain | Bruce B. Doris, Hong He, Gauri Karve, Fee Li Lie | 2016-12-06 |
| 9515089 | Bulk fin formation with vertical fin sidewall profile | Kangguo Cheng, Hong He, Chiahsun Tseng, Yunpeng Yin | 2016-12-06 |
| 9502411 | Strained finFET device fabrication | Bruce B. Doris, Hong He, Gauri Karve, Fee Li Lie, Stuart A. Sieg | 2016-11-22 |
| 9472447 | Confined eptaxial growth for continued pitch scaling | Balasubramanian Pranatharthiharan | 2016-10-18 |
| 9472506 | Registration mark formation during sidewall image transfer process | David J. Conklin, Allen H. Gabor, Byeong Y. Kim, Fee Li Lie, Stuart A. Sieg | 2016-10-18 |
| 9472415 | Directional chemical oxide etch technique | Emre Alptekin, Ahmet S. Ozcan, Viraj Y. Sardesai, Cung D. Tran | 2016-10-18 |
| 9431399 | Method for forming merged contact for semiconductor device | Emre Alptekin, Balasubramanian Pranatharthiharan, Ravikumar Ramachandran, Mickey H. Yu | 2016-08-30 |
| 9331148 | FinFET device with channel strain | Bruce B. Doris, Hong He, Gauri Karve, Fee Li Lie | 2016-05-03 |
| 9312136 | Replacement metal gate stack for diffusion prevention | Takashi Ando, Johnathan E. Faltermeier, Su Chen Fan, Injo Ok, Tenko Yamashita | 2016-04-12 |
| 9305845 | Self-aligned quadruple patterning process | Matthew E. Colburn, Fee Li Lie, Stuart A. Sieg | 2016-04-05 |
| 9299705 | Method of forming semiconductor fins and insulating fence fins on a same substrate | — | 2016-03-29 |
| 9287135 | Sidewall image transfer process for fin patterning | Bruce B. Doris, Hong He, Alexander Reznicek | 2016-03-15 |
| 9209178 | finFET isolation by selective cyclic etch | Stuart A. Sieg, Theodorus E. Standaert, Yunpeng Yin | 2015-12-08 |
| 9064813 | Trench patterning with block first sidewall image transfer | Chiahsun Tseng, Yongan Xu, Yunpeng Yin | 2015-06-23 |
| 9064744 | Structure and method to realize conformal doping in deep trench applications | Veeraraghavan S. Basker, Hemanth Jagannathan, Babar A. Khan | 2015-06-23 |
| 8987800 | Semiconductor structures with deep trench capacitor and methods of manufacture | Kevin K. Chan, Babar A. Khan, Masaharu Kobayashi, Effendi Leobandung, Theodorus E. Standaert +1 more | 2015-03-24 |
| 8946802 | Method of eDRAM DT strap formation in FinFET device structure | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeb | 2015-02-03 |
| 8927365 | Method of eDRAM DT strap formation in FinFET device structure | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeb | 2015-01-06 |
| 8906793 | Borderless contact for an aluminum-containing gate | David V. Horak, Hemanth Jagannathan | 2014-12-09 |
| 8901670 | Semiconductor device including multiple metal semiconductor alloy region and a gate structure covered by a continuous encapsulating layer | Hemanth Jagannathan, Soon-Cheon Seo | 2014-12-02 |
| 8901667 | High performance non-planar semiconductor devices with metal filled inter-fin gaps | Hemanth Jagannathan | 2014-12-02 |