Issued Patents All Time
Showing 251–275 of 1,139 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11575022 | Vertical field-effect transistor late gate recess process with improved inter-layer dielectric protection | Wenyu Xu, Pietro Montanini, Hemanth Jagannathan | 2023-02-07 |
| 11569361 | Nanosheet transistors with wrap around contact | Julien Frougier, Kangguo Cheng, Chanro Park | 2023-01-31 |
| 11569356 | Scaled gate contact and source/drain cap | Hui Zang, Jae Gon Lee | 2023-01-31 |
| 11563173 | PCM cell with resistance drift correction | Heng Wu, Nanbo Gong, Cheng-Wei Cheng | 2023-01-24 |
| 11563082 | Reduction of drain leakage in nanosheet device | Pouya Hashemi, Takashi Ando, Alexander Reznicek | 2023-01-24 |
| 11557651 | Nanosheet transistors with inner airgaps | Heng Wu, Alexander Reznicek, Lan Yu | 2023-01-17 |
| 11557675 | Reduction of bottom epitaxy parasitics for vertical transport field effect transistors | Tao Li, Tsung-Sheng Kang, Alexander Reznicek | 2023-01-17 |
| 11545624 | Phase change memory cell resistive liner | Kangguo Cheng, Zuoguang Liu, Juntao Li | 2023-01-03 |
| 11538939 | Controlled bottom junctions | Brent A. Anderson, Juntao Li, Kangguo Cheng | 2022-12-27 |
| 11527535 | Variable sheet forkFET device | Julien Frougier, Kangguo Cheng, Chanro Park | 2022-12-13 |
| 11527446 | Transistor having strain-inducing anchors and a strain-enhancing suspended channel | Kangguo Cheng, Juntao Li, Julien Frougier | 2022-12-13 |
| 11521894 | Partial wrap around top contact | Julien Frougier, Ekmini Anuja De Silva, Eric Miller | 2022-12-06 |
| 11521927 | Buried power rail for scaled vertical transport field effect transistor | Junli Wang, Choonghyun Lee, Alexander Reznicek | 2022-12-06 |
| 11508823 | Low capacitance low RC wrap-around-contact | Ekmini Anuja De Silva, Jing Guo, Hao Tang, Cheng Chi | 2022-11-22 |
| 11500614 | Stacked FET multiply and accumulate integrated circuit | Bahman Hekmatshoartabari, Alexander Reznicek, Jingyun Zhang | 2022-11-15 |
| 11502169 | Nanosheet semiconductor devices with n/p boundary structure | Jingyun Zhang, Xin Miao, Alexander Reznicek | 2022-11-15 |
| 11502202 | Transistors with uniform source/drain epitaxy | Kangguo Cheng, Chun-Chen Yeh, Tenko Yamashita | 2022-11-15 |
| 11495538 | Fully aligned via for interconnect | Christopher J. Waskiewicz, Chih-Chao Yang, Lawrence A. Clevenger, Ashim Dutta | 2022-11-08 |
| 11489009 | Integrating embedded memory on CMOS logic using thin film transistors | Heng Wu, Julien Frougier, Bruce B. Doris, Chen Zhang | 2022-11-01 |
| 11489045 | Nanosheet transistor with body contact | Alexander Reznicek, Bahman Hekmatshoartabari, Tak H. Ning | 2022-11-01 |
| 11482617 | Vertical transport field-effect transistor including replacement gate | Chen Zhang, Kangguo Cheng, Julien Frougier | 2022-10-25 |
| 11476163 | Confined gate recessing for vertical transport field effect transistors | Chanro Park, Sung-Dae Suk, Heng Wu | 2022-10-18 |
| 11476346 | Vertical transistor having an oxygen-blocking top spacer | Chen Zhang, Christopher J. Waskiewicz, Shahab Siddiqui | 2022-10-18 |
| 11469146 | Methods of performing fin cut etch processes for FinFET semiconductor devices | Lei Zhuang, Balasubramanian Pranatharthiharan, Lars Liebmann, Terence B. Hook | 2022-10-11 |
| 11469309 | Gate contact structures and cross-coupled contact structures for transistor devices | Youngtag Woo, Daniel Chanemougame, Bipul C. Paul, Lars Liebmann, Heimanu Niebojewski +3 more | 2022-10-11 |