Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12103068 | Smart trim die assembly | Wally Kroeger, Owen Li, Lee Zhao, Les Shuman | 2024-10-01 |
| 10446484 | Through-silicon via with improved substrate contact for reduced through-silicon via (TSV) capacitance variability | John M. Safran, Jochonia N. Nxumalo, Sami Rosenblatt, Chandrasekharan Kothandaraman | 2019-10-15 |
| 10095115 | Forming edge etch protection using dual layer of positive-negative tone resists | Christopher B. Shing, Richard D. Kaplan, Timothy J. Wiltshire, Darius Brown | 2018-10-09 |
| 9847290 | Through-silicon via with improved substrate contact for reduced through-silicon via (TSV) capacitance variability | John M. Safran, Jochonia N. Nxumalo, Sami Rosenblatt, Chandrasekharan Kothandaraman | 2017-12-19 |
| 9728506 | Strain engineering devices using partial depth films in through-substrate vias | Mukta G. Farooq, Jennifer A. Oakley | 2017-08-08 |
| 9252133 | Electrical leakage reduction in stacked integrated circuits having through-silicon-via (TSV) structures | Christopher N. Collins, Mukta G. Farooq, Troy L. Graves-Abe, Gerd Pfeiffer, Thuy L. Tran-Quinn | 2016-02-02 |
| 8907494 | Electrical leakage reduction in stacked integrated circuits having through-silicon-via (TSV) structures | Christopher N. Collins, Mukta G. Farooq, Troy L. Graves-Abe, Gerd Pfeiffer, Thuy L. Tran-Quinn | 2014-12-09 |
| 7858485 | Structure and method for manufacturing trench capacitance | Huilong Zhu, Babar A. Khan, Xi Li, Thomas A. Wallner | 2010-12-28 |
| 7081393 | Reduced dielectric constant spacer materials integration for high speed logic gates | Michael P. Belyansky, Hsing-Jen Wann, Richard S. Wise, Hongwen Yan | 2006-07-25 |
| 6838347 | Method for reducing line edge roughness of oxide material using chemical oxide removal | Wesley C. Natzle, Richard S. Wise, Hongwen Yan, Bidan Zhang | 2005-01-04 |
| 6828187 | Method for uniform reactive ion etching of dual pre-doped polysilicon regions | Len Yuan Tsou, Qingyun Yang | 2004-12-07 |
| 6821890 | Method for improving adhesion to copper | Vincent J. McGahay, Thomas Ivers, Henry A. Nye, III | 2004-11-23 |
| 6727589 | Dual damascene flowable oxide insulation structure and metallic barrier | Stephen E. Greco, John P. Hummel, Vincent J. McGahay, Rebecca D. Mih, Kamalesh K. Srivastava | 2004-04-27 |
| 6720249 | Protective hardmask for producing interconnect structures | Timothy J. Dalton, Christopher V. Jahnes, Sampath Purushothaman | 2004-04-13 |
| 6703312 | Method of forming active devices of different gatelengths using lithographic printed gate images of same length | John W. Golz, Babar A. Khan, Christopher J. Waskiewicz, Teresa J. Wu | 2004-03-09 |
| 6518151 | Dual layer hard mask for eDRAM gate etch process | David M. Dobuzinsky, Babar A. Khan, Paul Wensley, Chienfan Yu | 2003-02-11 |
| 6479884 | Interim oxidation of silsesquioxane dielectric for dual damascene process | Robert Cook, Stephen E. Greco, John P. Hummel, Vincent J. McGahay, Rebecca D. Mih +1 more | 2002-11-12 |
| 6429067 | Dual mask process for semiconductor devices | James C. Brighten, Jeffrey J. Brown, John W. Golz, George A. Kaplita, Rebecca D. Mih +4 more | 2002-08-06 |
| 6348076 | Slurry for mechanical polishing (CMP) of metals and use thereof | Donald F. Canaperi, William J. Cote, Paul M. Feeney, Mahadevaiyer Krishnan, Michael F. Lofaro +2 more | 2002-02-19 |
| 6348736 | In situ formation of protective layer on silsesquioxane dielectric for dual damascene process | Vincent J. McGahay, John P. Hummel, Rebecca D. Mih, Kamalesh K. Srivastava, Robert Cook +1 more | 2002-02-19 |
| 6329280 | Interim oxidation of silsesquioxane dielectric for dual damascene process | Robert Cook, Stephen E. Greco, John P. Hummel, Vincent J. McGahay, Rebecca D. Mih +1 more | 2001-12-11 |
| 6284574 | Method of producing heat dissipating structure for semiconductor devices | Kevin S. Petrarca, Sarah H. Knickerbocker, Rebecca D. Mih | 2001-09-04 |
| 6271595 | Method for improving adhesion to copper | Vincent J. McGahay, Thomas Ivers, Henry A. Nye, III | 2001-08-07 |
| 6221780 | Dual damascene flowable oxide insulation structure and metallic barrier | Stephen E. Greco, John P. Hummel, Vincent J. McGahay, Rebecca D. Mih, Kamalesh K. Srivastava | 2001-04-24 |