| 9870979 |
Double-sided segmented line architecture in 3D integration |
Pooja R. Batra, Mark D. Jacunski, Toshiaki Kirihata |
2018-01-16 |
$4,196,000 |
| 9559040 |
Double-sided segmented line architecture in 3D integration |
Pooja R. Batra, Mark D. Jacunski, Toshiaki Kirihata |
2017-01-31 |
$3,813,000 |
| 9543229 |
Combination of TSV and back side wiring in 3D integration |
Pooja R. Batra, Subramanian S. Iyer, Douglas C. La Tulipe, Jr., Spyridon Skordas, Kevin R. Winstel |
2017-01-10 |
$4,562,000 |
| 9536809 |
Combination of TSV and back side wiring in 3D integration |
Pooja R. Batra, Subramanian S. Iyer, Douglas C. La Tulipe, Jr., Spyridon Skordas, Kevin R. Winstel |
2017-01-03 |
$2,646,000 |
| 7046572 |
Low power manager for standby operation of memory system |
David R. Hansen, Gregory J. Fredeman, Hoki Kim, Paul C. Parries |
2006-05-16 |
$5,914,000 |
| 7023758 |
Low power manager for standby operation of a memory system |
David R. Hanson, Gregory J. Fredeman, Hoki Kim, Paul C. Parries |
2006-04-04 |
$10,598,000 |
| 6954387 |
Dynamic random access memory with smart refresh scheduler |
Hoki Kim, Toshiaki Kirihata, David R. Hanson, Gregory J. Fredeman |
2005-10-11 |
$11,788,000 |
| 6845033 |
Structure and system-on-chip integration of a two-transistor and two-capacitor memory cell for trench technology |
Toshiaki Kirihata |
2005-01-18 |
$12,326,000 |
| 6816397 |
Bi-directional read write data structure and method for memory |
David R. Hanson, Hoki Kim |
2004-11-09 |
$4,707,000 |
| 6768143 |
Structure and method of making three finger folded field effect transistors having shared junctions |
Gregory J. Fredeman, David R. Hanson, Hoki Kim |
2004-07-27 |
$9,809,000 |
| 6747890 |
Gain cell structure with deep trench capacitor |
Toshiaki Kirihata, Subramanian S. Iyer |
2004-06-08 |
$6,083,000 |
| 6703312 |
Method of forming active devices of different gatelengths using lithographic printed gate images of same length |
Babar A. Khan, Joyce C. Liu, Christopher J. Waskiewicz, Teresa J. Wu |
2004-03-09 |
$11,976,000 |
| 6472274 |
MOSFET with self-aligned channel edge implant and method |
Fumihiko Satoh |
2002-10-29 |
$17,932,000 |
| 6440638 |
Method and apparatus for resist planarization |
Chorng-Lii Hwang, John Zhu |
2002-08-27 |
$8,564,000 |
| 6429067 |
Dual mask process for semiconductor devices |
Joyce C. Liu, James C. Brighten, Jeffrey J. Brown, George A. Kaplita, Rebecca D. Mih +4 more |
2002-08-06 |
$5,918,000 |
| 6303275 |
Method for resist filling and planarization of high aspect ratio features |
Robert A. Coles, Qinghuang Lin, Alan C. Thomas, Christopher J. Waskiewicz, Teresa J. Wu |
2001-10-16 |
$28,845,000 |
| 6294449 |
Self-aligned contact for closely spaced transistors |
Teresa J. Wu, Bomy Chen, Charles W. Koburger, III, Paul C. Parries, Christopher J. Waskiewicz +1 more |
2001-09-25 |
$32,998,000 |
