Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8815475 | Reticle carrier | Kevin S. Petrarca, Donald F. Canaperi, Mahadevaiyer Krishnan, Steven E. Steen, Henry Grabarz +1 more | 2014-08-26 |
| 8439728 | Reticle carrier | Kevin S. Petrarca, Donald F. Canaperi, Mahadevaiyer Krishnan, Steven E. Steen, Henry Grabarz +1 more | 2013-05-14 |
| 8110321 | Method of manufacture of damascene reticle | Kevin S. Petrarca, Donald F. Canaperi, Mahadevaiyer Krishnan, Steven E. Steen, Henry Grabarz +1 more | 2012-02-07 |
| 6727589 | Dual damascene flowable oxide insulation structure and metallic barrier | Stephen E. Greco, John P. Hummel, Joyce C. Liu, Vincent J. McGahay, Kamalesh K. Srivastava | 2004-04-27 |
| 6504207 | Method to create EEPROM memory structures integrated with high performance logic and NVRAM, and operating conditions for the same | Bomy Chen, Jay G. Harrington, Kevin M. Houlihan, Dennis Hoyniak, Chung H. Lam +2 more | 2003-01-07 |
| 6479884 | Interim oxidation of silsesquioxane dielectric for dual damascene process | Robert Cook, Stephen E. Greco, John P. Hummel, Joyce C. Liu, Vincent J. McGahay +1 more | 2002-11-12 |
| 6448629 | Semiconductor device and method of making same | Kevin S. Petrarca | 2002-09-10 |
| 6429522 | Microprocessor having air as a dielectric and encapsulated lines | Kevin S. Petrarca | 2002-08-06 |
| 6429067 | Dual mask process for semiconductor devices | Joyce C. Liu, James C. Brighten, Jeffrey J. Brown, John W. Golz, George A. Kaplita +4 more | 2002-08-06 |
| 6407396 | Wafer metrology structure | Eric P. Solecky, Donald C. Wheeler | 2002-06-18 |
| 6391703 | Buried strap for DRAM using junction isolation technique | Nivo Rovedo, Chung H. Lam | 2002-05-21 |
| 6348736 | In situ formation of protective layer on silsesquioxane dielectric for dual damascene process | Vincent J. McGahay, John P. Hummel, Joyce C. Liu, Kamalesh K. Srivastava, Robert Cook +1 more | 2002-02-19 |
| 6329280 | Interim oxidation of silsesquioxane dielectric for dual damascene process | Robert Cook, Stephen E. Greco, John P. Hummel, Joyce C. Liu, Vincent J. McGahay +1 more | 2001-12-11 |
| 6326275 | DRAM cell with vertical CMOS transistor | Jay G. Harrington, David V. Horak, Kevin M. Houlihan, Chung H. Lam | 2001-12-04 |
| 6284574 | Method of producing heat dissipating structure for semiconductor devices | Kevin S. Petrarca, Sarah H. Knickerbocker, Joyce C. Liu | 2001-09-04 |
| 6268261 | Microprocessor having air as a dielectric and encapsulated lines and process for manufacture | Kevin S. Petrarca | 2001-07-31 |
| 6258732 | Method of forming a patterned organic dielectric layer on a substrate | Qinghuang Lin, Kevin S. Petrarca | 2001-07-10 |
| 6228745 | Selective reduction of sidewall slope on isolation edge | Donald C. Wheeler, Louis L. Hsu, Jack A. Mandelman | 2001-05-08 |
| 6221780 | Dual damascene flowable oxide insulation structure and metallic barrier | Stephen E. Greco, John P. Hummel, Joyce C. Liu, Vincent J. McGahay, Kamalesh K. Srivastava | 2001-04-24 |
| 6132940 | Method for producing constant profile sidewalls | Franz Zach | 2000-10-17 |
| 6114096 | Asymmetrical resist sidewall | Donald C. Wheeler, Timothy A. Brunner | 2000-09-05 |
| 6015991 | Asymmetrical field effect transistor | Donald C. Wheeler, Jeffrey P. Gambino, Louis L. Hsu, Jack A. Mandelman | 2000-01-18 |
| 5985492 | Multi-phase mask | Donald C. Wheeler, Jack A. Mandelman | 1999-11-16 |
| 5948571 | Asymmetrical resist sidewall | Donald C. Wheeler, Timothy A. Brunner | 1999-09-07 |