Issued Patents All Time
Showing 25 most recent of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11588958 | Probe assembly for process vessels | Chen Chen, Paul Ream | 2023-02-21 |
| 9213060 | Probe-able voltage contrast test structures | Yi Feng, Oliver D. Patterson | 2015-12-15 |
| 9103875 | Probe-able voltage contrast test structures | Yi Feng, Oliver D. Patterson | 2015-08-11 |
| 9097760 | Probe-able voltage contrast test structures | Yi Feng, Oliver D. Patterson | 2015-08-04 |
| 8928057 | Uniform finFET gate height | Johnathan E. Faltermeier, Babar A. Khan, Ravikumar Ramachandran, Theodorus E. Standaert, Xinhui Wang | 2015-01-06 |
| 8748252 | Replacement metal gate transistors using bi-layer hardmask | Effendi Leobandung, Laertis Economikos, Young-Hee Kim, Dae-Gyu Park, Theodorus E. Standaert +3 more | 2014-06-10 |
| 8481423 | Methods to mitigate plasma damage in organosilicate dielectrics | John C. Arnold, Griselda Bonilla, Geraud Jean-Michel Dubois, Daniel C. Edelstein, Alfred Grill +8 more | 2013-07-09 |
| 8470706 | Methods to mitigate plasma damage in organosilicate dielectrics | John C. Arnold, Griselda Bonilla, Geraud Jean-Michel Dubois, Daniel C. Edelstein, Alfred Grill +8 more | 2013-06-25 |
| 8350583 | Probe-able voltage contrast test structures | Yi Feng, Oliver D. Patterson | 2013-01-08 |
| 8340800 | Monitoring a process sector in a production facility | Michael P. Guse, Mark E. Lagus, James Rice, Yunsheng Song | 2012-12-25 |
| 8293634 | Structures and methods for improving solder bump connections in semiconductor devices | Felix P. Anderson, Daniel C. Edelstein, Thomas L. McDevitt, Anthony K. Stamper | 2012-10-23 |
| 8288281 | Method for reducing amine based contaminants | Xiaomeng Chen, Anthony K. Stamper, Arthur C. Winslow | 2012-10-16 |
| 8242544 | Semiconductor structure having reduced amine-based contaminants | Xiaomeng Chen, Anthony K. Stamper, Arthur C. Winslow | 2012-08-14 |
| 7803708 | Method for reducing amine based contaminants | Xiaomeng Chen, Anthony K. Stamper, Arthur C. Winslow | 2010-09-28 |
| 7732866 | Grounding front-end-of-line structures on a SOI substrate | Oliver D. Patterson | 2010-06-08 |
| 7518190 | Grounding front-end-of-line structures on a SOI substrate | Oliver D. Patterson | 2009-04-14 |
| 7480990 | Method of making conductor contacts having enhanced reliability | John A. Fitzsimmons, Nancy Anne Greco, Thomas Ivers, Steven Moskowitz | 2009-01-27 |
| 7323382 | Intralevel decoupling capacitor, method of manufacture and testing circuit of the same | Kerry Bernstein, John A. Bracchitta, Tak H. Ning, Wilbur D. Pricer | 2008-01-29 |
| 7195971 | Method of manufacturing an intralevel decoupling capacitor | Kerry Bernstein, John A. Bracchitta, Tak H. Ning, Wilbur D. Pricer | 2007-03-27 |
| 7153776 | Method for reducing amine based contaminants | Xiaomeng Chen, Anthony K. Stamper, Arthur C. Winslow | 2006-12-26 |
| 7030031 | Method for forming damascene structure utilizing planarizing material coupled with diffusion barrier material | William C. Wille, Daniel C. Edelstein, Peter Biolsi, John Fritche, Allan Upham | 2006-04-18 |
| 6882015 | Intralevel decoupling capacitor, method of manufacture and testing circuit of the same | Kerry Bernstein, John A. Bracchitta, Tak H. Ning, Wilbur D. Pricer | 2005-04-19 |
| 6812193 | Slurry for mechanical polishing (CMP) of metals and use thereof | Michael T. Brigham, Donald F. Canaperi, Michael A. Cobb, Kenneth M. Davis, Scott A. Estes +9 more | 2004-11-02 |
| 6743268 | Chemical-mechanical planarization of barriers or liners for copper metallurgy | Daniel C. Edelstein, Naftali E. Lustig | 2004-06-01 |
| 6677637 | Intralevel decoupling capacitor, method of manufacture and testing circuit of the same | Kerry Bernstein, John A. Bracchitta, Tak H. Ning, Wilbur D. Pricer | 2004-01-13 |