HH

Herbert L. Ho

IBM: 102 patents #541 of 70,183Top 1%
SA Siemens Aktiengesellschaft: 11 patents #902 of 22,248Top 5%
Globalfoundries: 9 patents #393 of 4,424Top 9%
KT Kabushiki Kaisha Toshiba: 5 patents #5,683 of 21,451Top 30%
GU Globalfoundries U.S.: 4 patents #133 of 665Top 20%
Infineon Technologies Ag: 2 patents #91 of 446Top 25%
📍 New Windsor, NY: #1 of 112 inventorsTop 1%
🗺 New York: #408 of 115,490 inventorsTop 1%
Overall (All Time): #10,532 of 4,157,543Top 1%
117
Patents All Time

Issued Patents All Time

Showing 76–100 of 117 patents

Patent #TitleCo-InventorsDate
7153737 Self-aligned, silicided, trench-based, DRAM/EDRAM processes with improved retention Oh-Jung Kwon, Kim Bosang, Babar A. Khan, Deok-kee Kim 2006-12-26
7118986 STI formation in semiconductor device including SOI and bulk silicon regions Michael D. Steigerwalt, Mahender Kumar, David M. Dobuzinsky, Johnathan E. Faltermeier, Denise Pendleton 2006-10-10
7115965 Vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness for low-substrate bias operation Mahender Kumar, Qiqing C. Ouyang, Paul A. Papworth, Christopher D. Sheraw, Michael D. Steigerwalt 2006-10-03
7078756 Collarless trench DRAM device Yoichi Otani, Babar A. Khan, Paul C. Parries 2006-07-18
7073139 Method for determining cell body and biasing plate contact locations for embedded dram in SOI Karen Bard 2006-07-04
6995094 Method for deep trench etching through a buried insulator layer Mahender Kumar, Brian W. Messenger, Michael D. Steigerwalt 2006-02-07
6964897 SOI trench capacitor cell incorporating a low-leakage floating body array transistor Karen Bard, David M. Dobuzinsky, Mahendar Kumar, Denise Pendleton, Michael D. Steigerwalt +1 more 2005-11-15
6815749 Backside buried strap for SOI DRAM trench capacitor Jack A. Mandelman 2004-11-09
6670675 Deep trench body SOI contacts with epitaxial layer formation S. Sundar Kumar Iyer, Babar A. Khan, Robert Hannon 2003-12-30
6635525 Method of making backside buried strap for SOI DRAM trench capacitor Jack A. Mandelman 2003-10-21
6553561 Method for patterning a silicon-on-insulator photomask Karen Bard 2003-04-22
6503798 Low resistance strap for high density trench DRAMS Ramachandra Divakaruni, Jeffrey P. Gambino, Akira Sudo 2003-01-07
6486043 Method of forming dislocation filter in merged SOI and non-SOI chips Robert Hannon, Subramanian S. Iyer, S. Sundar Kumar Iyer 2002-11-26
6479368 Method of manufacturing a semiconductor device having a shallow trench isolating region Jack A. Mandelman, Mutsuo Morikado, Jeffrey P. Gambino 2002-11-12
6429101 Method of forming thermally stable polycrystal to single crystal electrical contact structure Ricky S. Amos, Arne Ballantine, Gregory Bazan, Bomy Chen, Douglas D. Coolbaugh +6 more 2002-08-06
6410399 Process to lower strap, wordline and bitline contact resistance in trench-based DRAMS by silicidization Philip L. Flaitz, Subramanian S. Iyer, Babar A. Khan, Paul C. Parries 2002-06-25
6383929 Copper vias in low-k technology Steven H. Boettcher, Mark Hoinkis, Hyun Koo Lee, Yun-Yu Wang, Kwong Hon Wong 2002-05-07
6348394 Method and device for array threshold voltage control by trapped charge in trench isolation Jack A. Mandelman, Rama Divakaruni, Giuseppe La Rosa, Yujun Li, Jochen Beintner +1 more 2002-02-19
6340615 Method of forming a trench capacitor DRAM cell Sundar Iyer, Rama Divakaruni, Subramanian S. Iyer, Babar A. Khan 2002-01-22
6319794 Structure and method for producing low leakage isolation devices Hiroyuki Akatsu, Tze-Chiang Chen, Laertis Economikos, Richard L. Kleinhenz, Jack A. Mandelman +1 more 2001-11-20
6297127 Self-aligned deep trench isolation to shallow trench isolation Bomy Chen, Liang Han, Robert Hannon, Jay G. Harrington, Hsing-Jen Wann 2001-10-02
6153474 Method of controllably forming a LOCOS oxide layer over a portion of a vertically extending sidewall of a trench extending into a semiconductor substrate Radhika Srinivasan, Scott D. Halle, Erwin Hammerl, David M. Dobuzinsky, Jack A. Mandelman +1 more 2000-11-28
6140208 Shallow trench isolation (STI) with bilayer of oxide-nitride for VLSI applications Farid Agahi, Gary B. Bronner, Bertrand Flietner, Erwin Hammerl, Radhika Srinivasan 2000-10-31
6046487 Shallow trench isolation with oxide-nitride/oxynitride liner John Benedict, David M. Dobuzinsky, Philip L. Flaitz, Erwin Hammerl, James F. Moseman +3 more 2000-04-04
6015985 Deep trench with enhanced sidewall surface area David E. Kotecki, Carl Radens 2000-01-18