Issued Patents All Time
Showing 76–100 of 888 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11462583 | Embedding magneto-resistive random-access memory devices between metal levels | Ashim Dutta, Daniel C. Edelstein, John C. Arnold, Theodorus E. Standaert | 2022-10-04 |
| 11444029 | Back-end-of-line interconnect structures with varying aspect ratios | Prasad Bhosale, Nicholas Anthony Lanzillo, Michael Rizzolo | 2022-09-13 |
| 11430690 | Interconnects having air gap spacers | Kenneth Chun Kuen Cheng, Koichi Motoyama, Oscar van der Straten, Joseph F. Maniscalco | 2022-08-30 |
| 11410879 | Subtractive back-end-of-line vias | Chanro Park, Koichi Motoyama, Kenneth Chun Kuen Cheng | 2022-08-09 |
| 11404311 | Metallic interconnect structures with wrap around capping layers | Cornelius Brown Peethala, Kedari Matam, Theo Standaert | 2022-08-02 |
| 11361987 | Forming decoupled interconnects | Ashim Dutta, Saumya Sharma, Tianji Zhou | 2022-06-14 |
| 11328954 | Bi metal subtractive etch for trench and via formation | Yann Mignot, Chanro Park, Injo Ok, Hsueh-Chung Chen | 2022-05-10 |
| 11322359 | Single process for liner and metal fill | Praneet Adusumilli, Alexander Reznicek, Oscar van der Straten | 2022-05-03 |
| 11322402 | Self-aligned top via scheme | Ruilong Xie, Carl Radens, Juntao Li, Kangguo Cheng | 2022-05-03 |
| 11315872 | Self-aligned top via | Chanro Park, Koichi Motoyama, Kenneth Chun Kuen Cheng, Kisik Choi | 2022-04-26 |
| 11315830 | Metallic interconnect structures with wrap around capping layers | Cornelius Brown Peethala, Kedari Matam, Theo Standaert | 2022-04-26 |
| 11315799 | Back end of line structures with metal lines with alternating patterning and metallization schemes | Ruilong Xie, Chanro Park, Kangguo Cheng, Juntao Li | 2022-04-26 |
| 11302639 | Footing flare pedestal structure | Baozhen Li, Ashim Dutta | 2022-04-12 |
| 11302630 | Electrode-via structure | Theodorus E. Standaert, Daniel C. Edelstein | 2022-04-12 |
| 11289375 | Fully aligned interconnects with selective area deposition | Chanro Park, Kenneth Chun Kuen Cheng, Koichi Motoyama | 2022-03-29 |
| 11282788 | Interconnect and memory structures formed in the BEOL | Baozhen Li | 2022-03-22 |
| 11276748 | Switchable metal insulator metal capacitor | Baozhen Li, Andrew Tae Kim, Barry P. Linder | 2022-03-15 |
| 11270935 | Metallization layer formation process | Kangguo Cheng, Ruilong Xie, Jing Guo | 2022-03-08 |
| 11257750 | E-fuse co-processed with MIM capacitor | Baozhen Li, Jim Shih-Chun Liang, Ernest Y. Wu | 2022-02-22 |
| 11251368 | Interconnect structures with selective capping layer | Tianji Zhou, Saumya Sharma, Ashim Dutta | 2022-02-15 |
| 11244907 | Metal surface preparation for increased alignment contrast | Tianji Zhou, Saumya Sharma, Dominik Metzler, Theodorus E. Standaert | 2022-02-08 |
| 11244897 | Back end of line metallization | Chanro Park, Koichi Motoyama, Kenneth Chun Kuen Cheng, Somnath Ghosh | 2022-02-08 |
| 11244861 | Method and structure for forming fully-aligned via | Ruilong Xie, Christopher J. Waskiewicz, Huai Huang | 2022-02-08 |
| 11244860 | Double patterning interconnect integration scheme with SAV | Shyng-Tsong Chen, Terry A. Spooner, Koichi Motoyama | 2022-02-08 |
| 11244854 | Dual damascene fully aligned via in interconnects | Kenneth Chun Kuen Cheng, Koichi Motoyama, Chanro Park | 2022-02-08 |