Issued Patents All Time
Showing 51–75 of 888 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11887641 | Simultaneous electrodes for magneto-resistive random access memory devices | Oscar van der Straten, Koichi Motoyama | 2024-01-30 |
| 11881433 | Advanced copper interconnects with hybrid microstructure | Daniel C. Edelstein | 2024-01-23 |
| 11881431 | Anti-fuse with laterally extended liner | Chanro Park, Koichi Motoyama, Kenneth Chun Kuen Cheng | 2024-01-23 |
| 11876047 | Decoupled interconnect structures | Saumya Sharma, Ashim Dutta, Tianji Zhou | 2024-01-16 |
| 11877458 | RRAM structures in the BEOL | Baozhen Li, Barry P. Linder, Vijay Narayanan | 2024-01-16 |
| 11817389 | Multi-metal interconnects for semiconductor device structures | Hsueh-Chung Chen, Yann Mignot, Shanti Pancharatnam | 2023-11-14 |
| 11804378 | Surface conversion in chemical mechanical polishing | Raghuveer R. Patlolla, Donald F. Canaperi, Cornelius Brown Peethala, Mary Breton | 2023-10-31 |
| 11758819 | Magneto-resistive random access memory with laterally-recessed free layer | Oscar van der Straten, Koichi Motoyama, Kenneth Chun Kuen Cheng, Joseph F. Maniscalco | 2023-09-12 |
| 11744083 | Fabrication of embedded memory devices utilizing a self assembled monolayer | Ashim Dutta, Ekmini Anuja De Silva | 2023-08-29 |
| 11735468 | Interconnect structures including self aligned vias | Terry A. Spooner, Koichi Motoyama, Shyng-Tsong Chen | 2023-08-22 |
| 11715594 | Vertically-stacked interdigitated metal-insulator-metal capacitor for sub-20 nm pitch | Hsueh-Chung Chen | 2023-08-01 |
| 11688680 | MIM capacitor structures | Jim Shih-Chun Liang, Baozhen Li | 2023-06-27 |
| 11676894 | Resistance tunable fuse structure formed by embedded thin metal layers | Alexander Reznicek, Miaomiao Wang, Donald F. Canaperi | 2023-06-13 |
| 11676892 | Three-dimensional metal-insulator-metal capacitor embedded in seal structure | Baozhen Li, Huimei Zhou, Nan Jing | 2023-06-13 |
| 11647681 | Fabrication of phase change memory cell in integrated circuit | Baozhen Li, Andrew Tae Kim, Barry P. Linder | 2023-05-09 |
| 11637036 | Planarization stop region for use with low pattern density interconnects | Cornelius Brown Peethala, Hari Prasad Amanapu, Raghuveer R. Patlolla, Koichi Motoyama | 2023-04-25 |
| 11621294 | Embedding MRAM device in advanced interconnects | Ashim Dutta, Saumya Sharma, Tianji Zhou | 2023-04-04 |
| 11600325 | Non volatile resistive memory logic device | Hsueh-Chung Chen, Mary Claire Silvestre, Soon-Cheon Seo, Chi-Chun Liu, Fee Li Lie +2 more | 2023-03-07 |
| 11557507 | Via cleaning to reduce resistance | Yann Mignot | 2023-01-17 |
| 11557482 | Electrode with alloy interface | Daniel C. Edelstein, Chao-Kun Hu, Oscar van der Straten | 2023-01-17 |
| 11504763 | Aluminum alloy wheel and method for manufacturing the same | Yu-Hsien Chou, Chi-San Chen, Chang-Ching Chen | 2022-11-22 |
| 11502242 | Embedded memory devices | Ashim Dutta, Michael Rizzolo, Theodorus E. Standaert | 2022-11-15 |
| 11495538 | Fully aligned via for interconnect | Ruilong Xie, Christopher J. Waskiewicz, Lawrence A. Clevenger, Ashim Dutta | 2022-11-08 |
| 11489118 | Reliable resistive random access memory | Baozhen Li, Ernest Y. Wu, Andrew Tae Kim | 2022-11-01 |
| 11488862 | Semiconductor device with reduced via resistance | Conal E. Murray | 2022-11-01 |