Issued Patents All Time
Showing 25 most recent of 256 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12346884 | Mobile check deposit | Marlen L. Foster, Connie K. Yung, Raj M. Bharadwaj, Soumitri Kolavennu, Jessica G. Winberg +2 more | 2025-07-01 |
| 12265952 | Mobile check deposit | Marlen L. Foster, Connie K. Yung, Raj M. Bharadwaj, Soumitri Kolavennu, Jessica G. Winberg +2 more | 2025-04-01 |
| 12229734 | Mobile check deposit | Marlen L. Foster, Connie K. Yung, Raj M. Bharadwaj, Soumitri Kolavennu, Jessica G. Winberg +2 more | 2025-02-18 |
| 12039504 | Mobile check deposit | Marlen L. Foster, Connie K. Yung, Raj M. Bharadwaj, Soumitri Kolavennu, Jessica G. Winberg +2 more | 2024-07-16 |
| 12034005 | Self-aligned metal gate with poly silicide for vertical transport field-effect transistors | Brent A. Anderson, Ruqiang Bao, Dechao Guo | 2024-07-09 |
| 11956975 | BEOL fat wire level ground rule compatible embedded artificial intelligence integration | Soon-Cheon Seo, Dexin Kong, Takashi Ando, Paul C. Jamison, Hiroyuki Miyazoe +3 more | 2024-04-09 |
| 11877458 | RRAM structures in the BEOL | Baozhen Li, Chih-Chao Yang, Barry P. Linder | 2024-01-16 |
| 11749602 | Topological semi-metal interconnects | Ching-Tzu Chen, Nicholas Anthony Lanzillo, Takeshi Nogami | 2023-09-05 |
| 11700778 | Method for controlling the forming voltage in resistive random access memory devices | Steven P. Consiglio, Cory Wajda, Kandabara Tapily, Takaaki Tsunomura, Takashi Ando +3 more | 2023-07-11 |
| 11393725 | Multi-metal dipole doping to offer multi-threshold voltage pairs without channel doping for highly scaling CMOS device | Ruqiang Bao, Terence B. Hook, Hemanth Jagannathan | 2022-07-19 |
| 11258012 | Oxygen-free plasma etching for contact etching of resistive random access memory | Devi Koty, Qingyun Yang, Hiroyuki Miyazoe, Takashi Ando, Eduard A. Cartier +1 more | 2022-02-22 |
| 11244999 | Artificial synapse with hafnium oxide-based ferroelectric layer in CMOS back-end | Martin M. Frank, Takashi Ando, Xiao Sun, Jin-Ping Han | 2022-02-08 |
| 11216595 | Encryption engine with an undetectable/tamper-proof private key in late node CMOS technology | Richard H. Boivie, Eduard A. Cartier, Daniel J. Friedman, Kohji Hosokawa, Charanjit Singh Jutla +10 more | 2022-01-04 |
| 11217450 | Device with pure silicon oxide layer on silicon-germanium layer | Takashi Ando, Pouya Hashemi, Hemanth Jagannathan, Choonghyun Lee | 2022-01-04 |
| 11195762 | Multi-metal dipole doping to offer multi-threshold voltage pairs without channel doping for highly scaling CMOS device | Ruqiang Bao, Terence B. Hook, Hemanth Jagannathan | 2021-12-07 |
| 11195929 | Conformal replacement gate electrode for short channel devices | Takashi Ando, Ruqiang Bao, Masanobu Hatanaka, Yohei Ogawa, John Rozen | 2021-12-07 |
| 11158795 | Resistive switching memory with replacement metal electrode | Takashi Ando, Hiroyuki Miyazoe, Seyoung Kim | 2021-10-26 |
| 11152214 | Structures and methods for equivalent oxide thickness scaling on silicon germanium channel or III-V channel of semiconductor device | Takashi Ando, John Bruley, Eduard A. Cartier, Martin M. Frank, John Rozen | 2021-10-19 |
| 11121209 | Surface area enhancement for stacked metal-insulator-metal (MIM) capacitor | Takashi Ando, Eduard A. Cartier, Hemanth Jagannathan, Paul C. Jamison | 2021-09-14 |
| 11043535 | High-resistance memory devices | Takashi Ando, Marwan H. Khater, Seyoung Kim, Hiroyuki Miyazoe | 2021-06-22 |
| 11031301 | Gate formation scheme for n-type and p-type transistors having separately tuned threshold voltages | Ruqiang Bao, Unoh Kwon | 2021-06-08 |
| 10997321 | Encryption engine with an undetectable/tamper proof private key in late node CMOS technology | Richard H. Boivie, Eduard A. Cartier, Daniel J. Friedman, Kohji Hosokawa, Charanjit Singh Jutla +10 more | 2021-05-04 |
| 10991881 | Method for controlling the forming voltage in resistive random access memory devices | Steven P. Consiglio, Cory Wajda, Kandabara Tapily, Takaaki Tsunomura, Takashi Ando +3 more | 2021-04-27 |
| 10985075 | Gate formation scheme for n-type and p-type transistors having separately tuned threshold voltages | Ruqiang Bao, Unoh Kwon | 2021-04-20 |
| 10978551 | Surface area enhancement for stacked metal-insulator-metal (MIM) capacitor | Takashi Ando, Eduard A. Cartier, Hemanth Jagannathan, Paul C. Jamison | 2021-04-13 |