Issued Patents All Time
Showing 1–25 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12424550 | Buried metal signal rail for memory arrays | Biswanath Senapati, Seiji Munetoh, Nicholas Anthony Lanzillo, Lawrence A. Clevenger, Geoffrey Burr | 2025-09-23 |
| 12413217 | Duty compensation scheme | Takeo Yasuda | 2025-09-09 |
| 12198039 | Synapse memory | Takeo Yasuda | 2025-01-14 |
| 12148682 | Memory cell in wafer backside | Biswanath Senapati, Seiji Munetoh, Nicholas Anthony Lanzillo, Lawrence A. Clevenger, Geoffrey Burr | 2024-11-19 |
| 11809982 | Performance and area efficient synapse memory cell structure | Takeo Yasuda, Junka Okazawa, Akiyo Iwashina | 2023-11-07 |
| 11763139 | Neuromorphic chip for updating precise synaptic weight values | Atsuya Okazaki, Masatoshi Ishii, Junka Okazawa, Takayuki Osogami | 2023-09-19 |
| 11586882 | Synapse memory | Takeo Yasuda | 2023-02-21 |
| 11270191 | On-chip Poisson spike generation | Junka Okazawa, Masatoshi Ishii, Atsuya Okazaki | 2022-03-08 |
| 11216595 | Encryption engine with an undetectable/tamper-proof private key in late node CMOS technology | Richard H. Boivie, Eduard A. Cartier, Daniel J. Friedman, Charanjit Singh Jutla, Wanki Kim +10 more | 2022-01-04 |
| 11188815 | Weight shifting for neuromorphic synapse array | Takeo Yasuda, Junka Okazawa | 2021-11-30 |
| 11023805 | Monitoring potential of neuron circuits | Masatoshi Ishii, Atsuya Okazaki, Junka Okazawa, Takayuki Osogami | 2021-06-01 |
| 11003984 | Timing sequence for digital STDP synapse and LIF neuron-based neuromorphic system | Masatoshi Ishii, Yutaka Nakamura, Junka Okazawa, Takeo Yasuda | 2021-05-11 |
| 10997321 | Encryption engine with an undetectable/tamper proof private key in late node CMOS technology | Richard H. Boivie, Eduard A. Cartier, Daniel J. Friedman, Charanjit Singh Jutla, Wanki Kim +10 more | 2021-05-04 |
| 10891543 | LUT based synapse weight update scheme in STDP neuromorphic systems | Masatoshi Ishii, Yutaka Nakamura, Junka Okazawa, Takeo Yasuda | 2021-01-12 |
| 10810489 | Neuron peripheral circuits for neuromorphic synaptic memory array based on neuron models | Masatoshi Ishii, Sangbum Kim, Chung H. Lam, Scott C. Lewis | 2020-10-20 |
| 10762419 | Digitial STDP synapse and LIF neuron-based neuromorphic system | Takeo Yasuda, Yutaka Nakamura, Junka Okazawa, Masatoshi Ishii | 2020-09-01 |
| 10748058 | LUT based neuron membrane potential update scheme in STDP neuromorphic systems | Masatoshi Ishii, Yutaka Nakamura, Junka Okazawa, Takeo Yasuda | 2020-08-18 |
| 10672471 | Linearly weight updatable CMOS synaptic array without cell location dependence | Masatoshi Ishii, Atsuya Okazaki, Akiyo Iwashina | 2020-06-02 |
| 10572799 | Neuron peripheral circuits for neuromorphic synaptic memory array based on neuron models | Masatoshi Ishii, Sangbum Kim, Chung H. Lam, Scott C. Lewis | 2020-02-25 |
| 10552731 | Digital STDP synapse and LIF neuron-based neuromorphic system | Takeo Yasuda, Yutaka Nakamura, Junka Okazawa, Masatoshi Ishii | 2020-02-04 |
| 10490273 | Linearly weight updatable CMOS synaptic array without cell location dependence | Masatoshi Ishii, Atsuya Okazaki, Akiyo Iwashina | 2019-11-26 |
| 10446231 | Memory cell structure | Masatoshi Ishii, Takeo Yasuda | 2019-10-15 |
| 10423805 | Encryption engine with an undetectable/tamper-proof private key in late node CMOS technology | Richard H. Boivie, Eduard A. Cartier, Daniel J. Friedman, Charanjit Singh Jutla, Wanki Kim +10 more | 2019-09-24 |
| 10417559 | Communicating postsynaptic neuron fires to neuromorphic cores | Sangbum Kim, Chung H. Lam | 2019-09-17 |
| 10339444 | Monitoring potential of neuron circuits | Masatoshi Ishii, Atsuya Okazaki, Junka Okazawa, Takayuki Osogami | 2019-07-02 |