Issued Patents All Time
Showing 26–39 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10297321 | Memory cell structure | Masatoshi Ishii, Takeo Yasuda | 2019-05-21 |
| 10289950 | Monitoring potential of neuron circuits | Masatoshi Ishii, Atsuya Okazaki, Junka Okazawa, Takayuki Osogami | 2019-05-14 |
| 10169701 | Neuron peripheral circuits for neuromorphic synaptic memory array based on neuron models | Masatoshi Ishii, Sangbum Kim, Chung H. Lam, Scott C. Lewis | 2019-01-01 |
| 10090047 | Memory cell structure | Masatoshi Ishii, Takeo Yasuda | 2018-10-02 |
| 7313045 | Dynamic semiconductor storage device | Hisatada Miyatake, Toshio Sunaga | 2007-12-25 |
| 7274612 | DRAM circuit and its operation method | Yohtaroh Mori | 2007-09-25 |
| 6999364 | DRAM circuit and its operation method | Yohtaroh Mori | 2006-02-14 |
| 6925028 | DRAM with multiple virtual bank architecture for random row access | Toshio Sunaga, Shinpei Watanabe | 2005-08-02 |
| 6462613 | Power controlled input receiver | Michael Kleiner | 2002-10-08 |
| 6452832 | DRAM circuit and method of controlling the same | — | 2002-09-17 |
| 6252810 | Circuit and method for detecting defects in semiconductor memory | — | 2001-06-26 |
| 6252431 | Shared PMOS sense amplifier | — | 2001-06-26 |
| 6246630 | Intra-unit column address increment system for memory | Toshiaki Kirihata | 2001-06-12 |
| 6002275 | Single ended read write drive for memory | Toshiaki Kirihata | 1999-12-14 |