Issued Patents All Time
Showing 25 most recent of 56 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12413217 | Duty compensation scheme | Kohji Hosokawa | 2025-09-09 |
| 12294369 | Asymmetrical clock separation and stage delay optimization in single flux quantum logic | Robert K. Montoye, Gerald W. Gibson | 2025-05-06 |
| 12198039 | Synapse memory | Kohji Hosokawa | 2025-01-14 |
| 12124946 | Bias scheme for single-device synaptic element | Masatoshi Ishii | 2024-10-22 |
| 11809982 | Performance and area efficient synapse memory cell structure | Kohji Hosokawa, Junka Okazawa, Akiyo Iwashina | 2023-11-07 |
| 11789857 | Data transfer with continuous weighted PPM duration signal | Atsuya Okazaki | 2023-10-17 |
| 11741353 | Bias scheme for single-device synaptic element | Masatoshi Ishii | 2023-08-29 |
| 11586882 | Synapse memory | Kohji Hosokawa | 2023-02-21 |
| 11475946 | Synapse weight update compensation | Atsuya Okazaki | 2022-10-18 |
| 11321608 | Synapse memory cell driver | Masatoshi Ishii | 2022-05-03 |
| 11308390 | Methods and systems of neuron leaky integrate and fire circuits | Mark B. Ritter | 2022-04-19 |
| 11188815 | Weight shifting for neuromorphic synapse array | Junka Okazawa, Kohji Hosokawa | 2021-11-30 |
| 11087811 | NVM synaptic element with gradual reset capability | Akiyo Iwashina, Atsuya Okazaki | 2021-08-10 |
| 11003984 | Timing sequence for digital STDP synapse and LIF neuron-based neuromorphic system | Kohji Hosokawa, Masatoshi Ishii, Yutaka Nakamura, Junka Okazawa | 2021-05-11 |
| 10891543 | LUT based synapse weight update scheme in STDP neuromorphic systems | Kohji Hosokawa, Masatoshi Ishii, Yutaka Nakamura, Junka Okazawa | 2021-01-12 |
| 10762419 | Digitial STDP synapse and LIF neuron-based neuromorphic system | Kohji Hosokawa, Yutaka Nakamura, Junka Okazawa, Masatoshi Ishii | 2020-09-01 |
| 10748058 | LUT based neuron membrane potential update scheme in STDP neuromorphic systems | Kohji Hosokawa, Masatoshi Ishii, Yutaka Nakamura, Junka Okazawa | 2020-08-18 |
| 10671911 | Current mirror scheme for an integrating neuron circuit | Mark B. Ritter | 2020-06-02 |
| 10643125 | Methods and systems of neuron leaky integrate and fire circuits | Mark B. Ritter | 2020-05-05 |
| 10552731 | Digital STDP synapse and LIF neuron-based neuromorphic system | Kohji Hosokawa, Yutaka Nakamura, Junka Okazawa, Masatoshi Ishii | 2020-02-04 |
| 10446231 | Memory cell structure | Kohji Hosokawa, Masatoshi Ishii | 2019-10-15 |
| 10297321 | Memory cell structure | Kohji Hosokawa, Masatoshi Ishii | 2019-05-21 |
| 10090047 | Memory cell structure | Kohji Hosokawa, Masatoshi Ishii | 2018-10-02 |
| 9996317 | High speed and low power circuit structure for barrel shifter | — | 2018-06-12 |
| 9501260 | High speed and low power circuit structure for barrel shifter | — | 2016-11-22 |