AH

Angela T. Hui

AM AMD: 101 patents #29 of 9,279Top 1%
SL Spansion Llc.: 58 patents #2 of 769Top 1%
Cypress Semiconductor: 11 patents #166 of 1,852Top 9%
Fujitsu Limited: 10 patents #3,161 of 24,456Top 15%
Globalfoundries: 4 patents #817 of 4,424Top 20%
Infineon Technologies Ag: 2 patents #3,160 of 7,486Top 45%
FA Fasl: 2 patents #14 of 52Top 30%
FL Fujitsu Semiconductor Limited: 1 patents #612 of 1,301Top 50%
FL Fujitsu Amd Semiconductor Limited: 1 patents #14 of 40Top 35%
📍 Fremont, CA: #33 of 9,298 inventorsTop 1%
🗺 California: #906 of 386,348 inventorsTop 1%
Overall (All Time): #5,603 of 4,157,543Top 1%
157
Patents All Time

Issued Patents All Time

Showing 76–100 of 157 patents

Patent #TitleCo-InventorsDate
6969654 Flash NVROM devices with UV charge immunity Tuan Pham, Mark T. Ramsbey, Jeffrey A. Shields, Dawn Hopper 2005-11-29
6936515 Method for fabricating a memory device having reverse LDD Hiroyuki Ogawa, Yu Sun 2005-08-30
6927129 Narrow wide spacer Yu Sun, Kuo-Tung Chang, Shenqing Fang 2005-08-09
6894342 Structure and method for preventing UV radiation damage in a memory cell and improving contact CD control Minh Van Ngo, Ning Cheng, Jaeyong Park, Jean Y. Yang, Hirokazu Tokuno +2 more 2005-05-17
6867063 Organic spin-on anti-reflective coating over inorganic anti-reflective coating Kouros Ghandehari, Dawn Hopper, Wenmei Li 2005-03-15
6867097 Method of making a memory cell with polished insulator layer Mark T. Ramsbey, Robert B. Ogle, Tommy Hsiao, Tuan Pham, Marina V. Plat +1 more 2005-03-15
6836398 System and method of forming a passive layer by a CMP process Ramkumar Subramanian, Jane V. Oglesby, Minh Van Ngo, Mark S. Chang, Sergey Lopatin +3 more 2004-12-28
6833581 Structure and method for preventing process-induced UV radiation damage in a memory cell Minh Van Ngo, Ning Cheng, Jaeyong Park, Jean Y. Yang, Kouros Ghandehari +1 more 2004-12-21
6809033 Innovative method of hard mask removal Jusuke Ogura 2004-10-26
6808996 Method for protecting gate edges from charge gain/loss in semiconductor device Tuan Pham, Mark T. Ramsbey, Sameer Haddad, Yu Sun, Chi Chang 2004-10-26
6808992 Method and system for tailoring core and periphery cells in a nonvolatile memory Kelwin Ko, Shenqing Fang, Hiroyuki Kinoshita, Wenmei Li, Yu Sun +1 more 2004-10-26
6803267 Silicon containing material for patterning polymeric memory element Ramkumar Subramanian, Christopher F. Lyons, Matthew S. Buynoski, Patrick K. Cheung, Ashok M. Khathuria +5 more 2004-10-12
6787458 Polymer memory device formed in via opening Nicholas H. Tripsas, Matthew S. Buynoski, Suzette K. Pangrle, Uzodinma Okoroanyanwu, Christopher F. Lyons +7 more 2004-09-07
6774432 UV-blocking layer for reducing UV-induced charging of SONOS dual-bit flash memory devices in BEOL Minh Van Ngo, Tazrien Kamal, Mark T. Ramsbey, Arvind Halliyal, Jaeyong Park +6 more 2004-08-10
6765254 Structure and method for preventing UV radiation damage and increasing data retention in memory cells Minh Van Ngo, Ning Cheng, Jaeyong Park, Jean Y. Yang, Hidehiko Shiraiwa +3 more 2004-07-20
6764929 Method and system for providing a contact hole in a semiconductor device Chi Chang, Mark S. Chang 2004-07-20
6753247 Method(s) facilitating formation of memory cell(s) and patterned conductive Uzodinma Okoroanyanwu, Suzette K. Pangrle, Matthew S. Buynoski, Nicholas H. Tripsas, Mark S. Chang +1 more 2004-06-22
6727143 Method and system for reducing charge gain and charge loss when using an ARC layer in interlayer dielectric formation Mark T. Ramsbey, Yu Sun, David Matsumoto 2004-04-27
6713809 Dual bit memory device with isolated polysilicon floating gates Jusuke Ogura, Kazuhiro Kurihara, Masaru Yano, Hideki Komori, Tuan Pham 2004-03-30
6706576 Laser thermal annealing of silicon nitride for increased density and etch selectivity Minh Van Ngo 2004-03-16
6680507 Dual bit isolation scheme for flash memory devices having polysilicon floating gates Tuan Pham 2004-01-20
6670265 Low K dielectic etch in high density plasma etcher Fei Wang, James Kai 2003-12-30
6664191 Non self-aligned shallow trench isolation process with disposable space to define sub-lithographic poly space Unsoon Kim, Yider Wu, Yu Sun, Michael K. Templeton, Chi Chang 2003-12-16
6664180 Method of forming smaller trench line width using a spacer hard mask Bhanwar Singh 2003-12-16
6656763 Spin on polymers for organic memory devices Jane V. Oglesby, Christopher F. Lyons, Ramkumar Subramanian, Minh Van Ngo, Suzette K. Pangrle 2003-12-02