| 7301193 |
Structure and method for low Vss resistance and reduced DIBL in a floating gate memory cell |
Shenqing Fang, Timothy Thurgate, Kuo-Tung Chang, Richard Fastow, Angela T. Hui +4 more |
2007-11-27 |
| 7071101 |
Sacrificial TiN arc layer for increased pad etch throughput |
Jeffrey A. Shields |
2006-07-04 |
| 7060564 |
Memory device and method of simultaneous fabrication of core and periphery of same |
Inkuk Kang, Hiroyuki Kinoshita, Weidong Qian, Yu Sun |
2006-06-13 |
| 6974995 |
Method and system for forming dual gate structures in a nonvolatile memory using a protective layer |
Angela T. Hui, Shenqing Fang, Hiroyuki Kinoshita, Wenmei Li, Yu Sun +2 more |
2005-12-13 |
| 6808992 |
Method and system for tailoring core and periphery cells in a nonvolatile memory |
Shenqing Fang, Angela T. Hui, Hiroyuki Kinoshita, Wenmei Li, Yu Sun +1 more |
2004-10-26 |
| 6806155 |
Method and system for scaling nonvolatile memory cells |
Chi Chang |
2004-10-19 |
| 6613657 |
BPSG, SA-CVD liner/P-HDP gap fill |
Minh Van Ngo, Dawn Hopper, Wenmei Li, Kuo-Tung Chang, Tyagamohan Gottipati |
2003-09-02 |
| 6583009 |
Innovative narrow gate formation for floating gate flash technology |
Angela T. Hui, Hiroyuki Kinoshita, Sameer Haddad, Yu Sun |
2003-06-24 |
| 6143608 |
Barrier layer decreases nitrogen contamination of peripheral gate regions during tunnel oxide nitridation |
Yue-Song He, Masaaki Higashitani, Hao Fang, Narbeh Derhacobian, Bill Douglas Cox +2 more |
2000-11-07 |
