Issued Patents All Time
Showing 25 most recent of 57 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10446747 | Methods of operating integrated circuit devices having volatile and nonvolatile memory portions | Shane Hollmer | 2019-10-15 |
| 9570166 | Read operations and circuits for memory devices having programmable elements, including programmable resistance elements | Nad Edward Gilbert, Ishai Naveh | 2017-02-14 |
| 9159414 | Programmable impedance element circuits and methods | Shane Hollmer, John Dinh | 2015-10-13 |
| 9007814 | Application of relaxation voltage pulses to programmble impedance elements during read operations | — | 2015-04-14 |
| 8995173 | Memory cells, devices and method with dynamic storage elements and programmable impedance shadow elements | — | 2015-03-31 |
| 8947913 | Circuits and methods having programmable impedance elements | Ishai Naveh | 2015-02-03 |
| 8913444 | Read operations and circuits for memory devices having programmable elements, including programmable resistance elements | Nad Edward Gilbert, Ishai Naveh | 2014-12-16 |
| 8822967 | Multi-terminal phase change devices | Louis Charles Kordus, II, Antonietta Oliva, Vei-Han Chan | 2014-09-02 |
| 8687403 | Circuits having programmable impedance elements | Shane Hollmer, Ishai Naveh | 2014-04-01 |
| 8675396 | Integrated circuit devices and systems having programmable impedance elements with different response types | Ishai Naveh, Shane Hollmer | 2014-03-18 |
| 8659926 | PMC-based non-volatile CAM | — | 2014-02-25 |
| 8331128 | Reconfigurable memory arrays having programmable impedance elements and corresponding methods | Shane Hollmer | 2012-12-11 |
| 8320148 | PMC-based non-volatile CAM | — | 2012-11-27 |
| 8294488 | Programmable impedance element circuits and methods | Shane Hollmer, John Dinh | 2012-10-23 |
| 8183551 | Multi-terminal phase change devices | Louis Charles Kordus, II, Antonietta Oliva, Vei-Han Chan | 2012-05-22 |
| 7755389 | Reconfigurable logic structures | Colin N. Murphy, Louis Charles Kordus, II, Antonietta Oliva, Vei-Han Chan, Thomas E. Stewart | 2010-07-13 |
| 7095076 | Electrically-alterable non-volatile memory cell | Kim Han, Jaroslav Raszka | 2006-08-22 |
| 6788574 | Electrically-alterable non-volatile memory cell | Kim Han, Jaroslav Raszka | 2004-09-07 |
| 6750157 | Nonvolatile memory cell with a nitridated oxide layer | Richard Fastow, Chi Chang | 2004-06-15 |
| 6618290 | Method of programming a non-volatile memory cell using a baking process | Janet Wang | 2003-09-09 |
| 6590811 | Higher program VT and faster programming rates based on improved erase methods | Darlene Hamilton, Janet Wang, Kulachet Tanpairoj | 2003-07-08 |
| 6567303 | Charge injection | Darlene Hamilton, Janet Wang, Tim Thurgate, Michael Han | 2003-05-20 |
| 6555436 | Simultaneous formation of charge storage and bitline to wordline isolation | Mark T. Ramsbey, Jean Y. Yang, Hidehiko Shiraiwa, Michael A. Van Buskirk, David Michael Rogers +3 more | 2003-04-29 |
| 6549466 | Using a negative gate erase voltage applied in steps of decreasing amounts to reduce erase time for a non-volatile memory cell with an oxide-nitride-oxide (ONO) structure | Michael A. Van Buskirk, Chi Chang, Daniel Sobek | 2003-04-15 |
| 6541816 | Planar structure for non-volatile memory devices | Mark T. Ramsbey, Jean Y. Yang, Hidehiko Shiraiwa, Michael A. Van Buskirk, David Michael Rogers +2 more | 2003-04-01 |