Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11876090 | ESD protection circuit | Eric N. Mann, Eric Lee Swindlehurst, Toru Miyamae, Timothy Williams, Ryuta Nagai +6 more | 2024-01-16 |
| 11581729 | Combined positive and negative voltage electrostatic discharge (ESD) protection clamp with cascoded circuitry | Henry H. Yuan, Mimi Qian, Myeongseok Lee, Sungkwon Lee, Yan Yi +2 more | 2023-02-14 |
| 11521962 | ESD protection circuit | Eric N. Mann, Eric Lee Swindlehurst, Toru Miyamae, Timothy Williams, Ryuta Nagai +6 more | 2022-12-06 |
| 9318373 | Method and apparatus for protection against process-induced charging | Mimi Qian, Kwadwo Appiah, Mark Randolph, Michael VanBuskirk, Tazrien Kamal +3 more | 2016-04-19 |
| 8445966 | Method and apparatus for protection against process-induced charging | Mimi Qian, Kwadwo Appiah, Mark Randolph, Michael VanBuskirk, Tazrien Kamal +3 more | 2013-05-21 |
| 6838869 | Clocked based method and devices for measuring voltage-variable capacitances and other on-chip parameters | Mimi Qian, Roger Tsao, Michael A. Van Buskirk | 2005-01-04 |
| 6770938 | Diode fabrication for ESD/EOS protection | Michael Fliesler, Mark T. Ramsbey, Mark Randolph, Ian Morgan, Timothy Thurgate +1 more | 2004-08-03 |
| 6555436 | Simultaneous formation of charge storage and bitline to wordline isolation | Mark T. Ramsbey, Jean Y. Yang, Hidehiko Shiraiwa, Michael A. Van Buskirk, Ravi Sunkavalli +3 more | 2003-04-29 |
| 6541816 | Planar structure for non-volatile memory devices | Mark T. Ramsbey, Jean Y. Yang, Hidehiko Shiraiwa, Michael A. Van Buskirk, Ravi Sunkavalli +2 more | 2003-04-01 |
| 6530068 | Device modeling and characterization structure with multiplexed pads | Huazhe Cao, Mimi Qian | 2003-03-04 |
| 6468865 | Method of simultaneous formation of bitline isolation and periphery oxide | Jean Y. Yang, Mark T. Ramsbey, Hidehiko Shiraiwa, Michael A. Van Buskirk, Ravi Sunkavalli +3 more | 2002-10-22 |
| 6465306 | Simultaneous formation of charge storage and bitline to wordline isolation | Mark T. Ramsbey, Jean Y. Yang, Hidehiko Shiraiwa, Michael A. Van Buskirk, Ravi Sunkavalli +3 more | 2002-10-15 |
| 5908318 | Method of forming low capacitance interconnect structures on semiconductor substrates | Hsingya Arthur Wang | 1999-06-01 |
| 4987465 | Electro-static discharge protection device for CMOS integrated circuit inputs | Steven W. Longcor, Kuang-Yeh Chang, Jih-Chang Lien | 1991-01-22 |