JW

Janet Wang

AM AMD: 23 patents #450 of 9,279Top 5%
Fujitsu Limited: 4 patents #7,093 of 24,456Top 30%
Overall (All Time): #186,646 of 4,157,543Top 5%
23
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
6618290 Method of programming a non-volatile memory cell using a baking process Narbeh Derhacobian 2003-09-09
6590811 Higher program VT and faster programming rates based on improved erase methods Darlene Hamilton, Narbeh Derhacobian, Kulachet Tanpairoj 2003-07-08
6567303 Charge injection Darlene Hamilton, Narbeh Derhacobian, Tim Thurgate, Michael Han 2003-05-20
6555436 Simultaneous formation of charge storage and bitline to wordline isolation Mark T. Ramsbey, Jean Y. Yang, Hidehiko Shiraiwa, Michael A. Van Buskirk, David Michael Rogers +3 more 2003-04-29
6541816 Planar structure for non-volatile memory devices Mark T. Ramsbey, Jean Y. Yang, Hidehiko Shiraiwa, Michael A. Van Buskirk, David Michael Rogers +2 more 2003-04-01
6490205 Method of erasing a non-volatile memory cell using a substrate bias Ravi Sunkavalli 2002-12-03
6468865 Method of simultaneous formation of bitline isolation and periphery oxide Jean Y. Yang, Mark T. Ramsbey, Hidehiko Shiraiwa, Michael A. Van Buskirk, David Michael Rogers +3 more 2002-10-22
6465306 Simultaneous formation of charge storage and bitline to wordline isolation Mark T. Ramsbey, Jean Y. Yang, Hidehiko Shiraiwa, Michael A. Van Buskirk, David Michael Rogers +3 more 2002-10-15
6465303 Method of manufacturing spacer etch mask for silicon-oxide-nitride-oxide-silicon (SONOS) type nonvolatile memory Mark T. Ramsbey, Narbeh Derhacobian, Angela T. Hui, Tuan Pham, Ravi Sunkavalli +1 more 2002-10-15
6459618 Method of programming a non-volatile memory cell using a drain bias 2002-10-01
6456533 Higher program VT and faster programming rates based on improved erase methods Darlene Hamilton, Narbeh Derhacobian, Kulachet Tanpairoj 2002-09-24
6456531 Method of drain avalanche programming of a non-volatile memory cell Sameer Haddad 2002-09-24
6456536 Method of programming a non-volatile memory cell using a substrate bias Daniel Sobek, Timothy Thurgate, Narbeh Derhacobian 2002-09-24
6410956 Method and system for using a spacer to offset implant damage and reduce lateral diffusion in flash memory devices Vei-Han Chan, Scott Luning, Mark Randolph, Nicholas H. Tripsas, Daniel Sobek +2 more 2002-06-25
6331953 Intelligent ramped gate and ramped drain erasure for non-volatile memory cells Narbeh Derhacobian, Daniel Sobek 2001-12-18
6331952 Positive gate erasure for non-volatile memory cells Narbeh Derhacobian, Ravi Sunkavalli 2001-12-18
6269023 Method of programming a non-volatile memory cell using a current limiter Narbeh Derhacobian, Daniel Sobek, Sameer Haddad 2001-07-31
6266281 Method of erasing non-volatile memory cells Narbeth Derhacobian, Michael A. Van Buskirk, Daniel Sobeck, Chi Chang 2001-07-24
6233175 Self-limiting multi-level programming states Ravi Sunkavalli 2001-05-15
6188101 Flash EPROM cell with reduced short channel effect and method for providing same 2001-02-13
6172909 Ramped gate technique for soft programming to tighten the Vt distribution Sameer Haddad 2001-01-09
6025240 Method and system for using a spacer to offset implant damage and reduce lateral diffusion in flash memory devices Vei-Han Chan, Scott Luning, Mark Randolph, Nicholas H. Tripsas, Daniel Sobek +2 more 2000-02-15
5888867 Non-uniform threshold voltage adjustment in flash eproms through gate work function alteration Scott Luning, Vei-Han Chan, Nicholas H. Tripsas 1999-03-30