Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12170478 | Merged power delivery | Alexander B. Uan-Zo-Li, Shuai Jiang, Jamie L. Langlinais, Per Hammarlund, Hans Lee Yeager +7 more | 2024-12-17 |
| 11493888 | Delay circuit with multiple dependencies | Bo Zhao | 2022-11-08 |
| 11152046 | Sram bit cell retention | Shahzad Nazar, Jaemyung Lim, Mohamed H. Abu-Rahma, Victor Zyuban | 2021-10-19 |
| 11004482 | Retention voltage generator circuit | Jaemyung Lim, Jiangyi Li, Mohamed H. Abu-Rahma, Shahzad Nazar | 2021-05-11 |
| 10630290 | Low leakage power switch | Jaemyung Lim, Mohamed H. Abu-Rahma | 2020-04-21 |
| 10523194 | Low leakage power switch | Amrinder S. Barn, Victor Zyuban, Shingo Suzuki, Ajay Bhatia, Mohamed H. Abu-Rahma +2 more | 2019-12-31 |
| 9922699 | Adaptive diode sizing techniques for reducing memory power leakage | Yildiz Sinangil, Mohamed H. Abu-Rahma, Ajay Bhatia | 2018-03-20 |
| 9672902 | Bit-cell voltage control system | Yildiz Sinangil, Mohamed H. Abu-Rahma | 2017-06-06 |
| 7355914 | Methods and apparatuses for a sense amplifier | — | 2008-04-08 |
| 7184346 | Memory cell sensing with low noise generation | Vipin Tiwari | 2007-02-27 |
| 7130213 | Methods and apparatuses for a dual-polarity non-volatile memory cell | — | 2006-10-31 |
| 7095076 | Electrically-alterable non-volatile memory cell | Kim Han, Narbeh Derhacobian | 2006-08-22 |
| 6992938 | Methods and apparatuses for test circuitry for a dual-polarity non-volatile memory cell | Alexander Shubat | 2006-01-31 |
| 6850446 | Memory cell sensing with low noise generation | Vipin Tiwari | 2005-02-01 |
| 6842375 | Methods and apparatuses for maintaining information stored in a non-volatile memory cell | — | 2005-01-11 |
| 6788574 | Electrically-alterable non-volatile memory cell | Kim Han, Narbeh Derhacobian | 2004-09-07 |
| 6597629 | Built-in precision shutdown apparatus for effectuating self-referenced access timing scheme | Rohit Kumar Pandey | 2003-07-22 |
| 6473356 | Low power read circuitry for a memory circuit based on charge redistribution between bitlines and sense amplifier | — | 2002-10-29 |
| 6392957 | Fast read/write cycle memory device having a self-timed read/write control circuit | Alexander Shubat, Adam Kablanian, Richard S. Roy | 2002-05-21 |
| 6084820 | Dual port memory device with vertical shielding | — | 2000-07-04 |