Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9390212 | Methods and apparatus for synthesizing multi-port memory circuits | Sundar Iyer, Shang-Tse Chuang, Thu Nguyen, Sanjeev Joshi | 2016-07-12 |
| 9058860 | Methods and apparatus for synthesizing multi-port memory circuits | Sundar Iyer, Shang-Tse Chuang, Thu Nguyen, Sanjeev Joshi | 2015-06-16 |
| 8902672 | Methods and apparatus for designing and constructing multi-port memory circuits | Sundar Iyer, Shang-Tse Chuang, Thu Nguyen, Sanjeev Joshi, Kartik Mohanram | 2014-12-02 |
| 6738279 | Multi-bank memory with word-line banking, bit-line banking and I/O multiplexing utilizing tilable interconnects | — | 2004-05-18 |
| 6711067 | System and method for bit line sharing | — | 2004-03-23 |
| 6587364 | System and method for increasing performance in a compilable read-only memory (ROM) | Deepak Sabharwal | 2003-07-01 |
| 6424556 | System and method for increasing performance in a compilable read-only memory (ROM) | Deepak Sabharwal | 2002-07-23 |
| 6392957 | Fast read/write cycle memory device having a self-timed read/write control circuit | Alexander Shubat, Jaroslav Raszka, Richard S. Roy | 2002-05-21 |
| 6310817 | Multi-bank memory with word-line banking, bit-line banking and I/O multiplexing utilizing tilable interconnects | — | 2001-10-30 |
| 6104663 | Memory array with a simultaneous read or simultaneous write ports | — | 2000-08-15 |
| 6091620 | Multi-bank memory with word-line banking, bit-line banking and I/O multiplexing utilizing tilable interconnects | — | 2000-07-18 |
| 6084819 | Multi-bank memory with word-line banking | — | 2000-07-04 |
| 6065134 | Method for repairing an ASIC memory with redundancy row and input/output lines | Owen S. Bair, Saravana Soundararajan, Thomas Patrick Anderson, Chuong Le | 2000-05-16 |
| 6051031 | Module-based logic architecture and design flow for VLSI implementation | Alexander Shubat, Vardan Duvalyan | 2000-04-18 |
| 5764878 | Built-in self repair system for embedded memories | Thomas Patrick Anderson, Chuong Le, Owen S. Bair, Saravana Soundararajan | 1998-06-09 |
| 5577050 | Method and apparatus for configurable build-in self-repairing of ASIC memories design | Owen S. Bair, Charles Li, Farzad Zarrinfar | 1996-11-19 |