Issued Patents All Time
Showing 1–25 of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12379899 | Performing multiple bit computation and convolution in memory | Shahzad Nazar, Bharan Giridhar, Ajay Bhatia, Mayur Joshi, Yildiz Sinangil +1 more | 2025-08-05 |
| 12230361 | Acceleration of in-memory-compute arrays | Paolo Di Febbo, Jelam K. Parekh, Yildiz Sinangil, Mohammad Ghasemzadeh, Anthony Ghannoum +1 more | 2025-02-18 |
| 12170478 | Merged power delivery | Alexander B. Uan-Zo-Li, Shuai Jiang, Jamie L. Langlinais, Per Hammarlund, Hans Lee Yeager +7 more | 2024-12-17 |
| 11914973 | Performing multiple bit computation and convolution in memory | Shahzad Nazar, Bharan Giridhar, Ajay Bhatia, Mayur Joshi, Yildiz Sinangil +1 more | 2024-02-27 |
| 11694733 | Acceleration of in-memory-compute arrays | Paolo Di Febbo, Jelam K. Parekh, Yildiz Sinangil, Mohammad Ghasemzadeh, Anthony Ghannoum +1 more | 2023-07-04 |
| 11688486 | Retention voltage management for a volatile memory | Shahzad Nazar, Amrinder S. Barn | 2023-06-27 |
| 11675380 | Voltage regulation using local feedback | Shawn Searles, Victor Zyuban | 2023-06-13 |
| 11320849 | Voltage regulation using local feedback | Shawn Searles, Victor Zyuban | 2022-05-03 |
| 11196435 | Anti-aliasing techniques for time-to-digital converters | Pangjie Xu, Jelam K. Parekh | 2021-12-07 |
| 11152046 | Sram bit cell retention | Jaroslav Raszka, Shahzad Nazar, Jaemyung Lim, Victor Zyuban | 2021-10-19 |
| 11094395 | Retention voltage management for a volatile memory | Shahzad Nazar, Amrinder S. Barn | 2021-08-17 |
| 11004482 | Retention voltage generator circuit | Jaemyung Lim, Jiangyi Li, Shahzad Nazar, Jaroslav Raszka | 2021-05-11 |
| 10720193 | Technique to lower switching power of bit-lines by adiabatic charging of SRAM memories | Yildiz Sinangil | 2020-07-21 |
| 10630290 | Low leakage power switch | Jaemyung Lim, Jaroslav Raszka | 2020-04-21 |
| 10523194 | Low leakage power switch | Jaroslav Raszka, Amrinder S. Barn, Victor Zyuban, Shingo Suzuki, Ajay Bhatia +2 more | 2019-12-31 |
| 9922699 | Adaptive diode sizing techniques for reducing memory power leakage | Yildiz Sinangil, Jaroslav Raszka, Ajay Bhatia | 2018-03-20 |
| 9875788 | Low-power 5T SRAM with improved stability and reduced bitcell size | Seong-Ook Jung, Hyunkook Park, Seung-Chul Song, Lixin Ge, Zhongze Wang +1 more | 2018-01-23 |
| 9865330 | Stable SRAM bitcell design utilizing independent gate FinFET | Seong-Ook Jung, Mingu Kang, Hyunkook Park, Seung-Chul Song, Beom-Mo Han +2 more | 2018-01-09 |
| 9786357 | Bit-cell voltage distribution system | Yildiz Sinangil | 2017-10-10 |
| 9698267 | Fin-type device system and method | Stanley Seungchul Song, Beom-Mo Han | 2017-07-04 |
| 9673786 | Flip-flop with reduced retention voltage | Seid Hadi Rasouli, Animesh Datta, Jay M. Shah, Martin Saint-Laurent, Peeyush Kumar Parkar +3 more | 2017-06-06 |
| 9672902 | Bit-cell voltage control system | Yildiz Sinangil, Jaroslav Raszka | 2017-06-06 |
| 9453879 | On-die system for monitoring and predicting performance | Brian S. Leibowitz, Michael R. Seningen | 2016-09-27 |
| 9337100 | Apparatus and method to fabricate an electronic device | Seung-Chul Song, Beom-Mo Han | 2016-05-10 |
| 9224453 | Write-assisted memory with enhanced speed | Peng Jin, Fahad Ahmed | 2015-12-29 |