Issued Patents 2017
Showing 1–25 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9831224 | Solution for reducing poor contact in info packages | Jing-Cheng Lin, Chen-Hua Yu, Szu-Wei Lu, Shih-Ting Lin | 2017-11-28 |
| 9806062 | Methods of packaging semiconductor devices and packaged semiconductor devices | Wen-Chih Chiou, Tu-Hao Yu, Hung-Jung Tu, Yu-Liang Lin, Shih-Hui Wang | 2017-10-31 |
| 9786567 | Chip-on-wafer process control monitoring for chip-on-wafer-on-substrate packages | Wei-Cheng Wu, Li-Han Hsu, Sao-Ling Chiu, Shang-Yun Hou, Chen-Hua Lin | 2017-10-10 |
| 9780072 | 3D semiconductor package interposer with die cavity | Shang-Yun Hou, Kim Hong Chen, Wensen Hung, Szu-Po Huang | 2017-10-03 |
| 9760670 | Semiconductor device design methods and conductive bump pattern enhancement methods | Tzu-Yu Wang, Wei-Cheng Wu, Kuo-Ching Hsu, Shang-Yun Hou | 2017-09-12 |
| 9748156 | Semiconductor package assembly, semiconductor package and forming method thereof | Shu-Shen Yeh, Cheng-Lin Huang, Chin-Hua Wang, Kuang-Chun Lee, Wen-Yi Lin +4 more | 2017-08-29 |
| 9741638 | Thermal structure for integrated circuit package | Cheng-Chieh Hsieh, Shang-Yun Hou, Way Lee Cheng | 2017-08-22 |
| 9735129 | Semiconductor packages and methods of forming the same | Hsien-Wei Chen, Jie Chen, Der-Chyang Yeh, Chen-Hua Yu | 2017-08-15 |
| 9735082 | 3DIC packaging with hot spot thermal management features | Wensen Hung, Szu-Po Huang, Hsiang-Fan Lee, Kim Hong Chen, Chi-Hsi Wu | 2017-08-15 |
| 9691840 | Cylindrical embedded capacitors | An-Jhih Su, Chi-Chun Hsieh, Tzu-Yu Wang, Wei-Cheng Wu, Hsien-Pin Hu +2 more | 2017-06-27 |
| 9679783 | Molding wafer chamber | Jing-Cheng Lin, Chin-Chuan Chang, Jui-Pin Hung, Szu-Wei Lu, Chen-Hua Yu | 2017-06-13 |
| 9666522 | Alignment mark design for packages | Li-Hsien Huang, Hsien-Wei Chen, Ching-Wen Hsiao, Der-Chyang Yeh, Chen-Hua Yu | 2017-05-30 |
| 9660016 | Method of manufacturing a capacitor | Chun Hua Chang, Der-Chyang Yeh, Kuang-Wei Cheng, Yuan-Hung Liu, Shang-Yun Hou +1 more | 2017-05-23 |
| 9653391 | Semiconductor packaging structure and manufacturing method thereof | Ming-Chih Yew, Kuang-Chun Lee, Po-Yao Lin, Shyue-Ter Leu | 2017-05-16 |
| 9640490 | Through silicon via keep out zone formation method and system | Cheng-Chieh Hsieh, Hung-An Teng, Shang-Yun Hou | 2017-05-02 |
| 9633929 | TSV formation | Ku-Feng Yang, Wen-Chih Chiou | 2017-04-25 |
| 9633869 | Packages with interposers and methods for forming the same | Sao-Ling Chiu, Kuo-Ching Hsu, Wei-Cheng Wu, Ping-Kang Huang, Shang-Yun Hou +1 more | 2017-04-25 |
| 9633900 | Method for through silicon via structure | Chen-Hua Yu, Wen-Chih Chiou, Fang Wen Tsai, Chen-Yu Tsai | 2017-04-25 |
| 9633954 | Methods of manufacturing an integrated circuit having stress tuning layer | Clinton Chao, Szu-Wei Lu | 2017-04-25 |
| 9627223 | Methods and apparatus of packaging with interposers | Chung-Yu Lu, Hsien-Pin Hu, Hsiao-Tsung Yen, Tzuan-Horng Liu, Shih-Wen Huang +1 more | 2017-04-18 |
| 9618572 | Testing of semiconductor chips with microbumps | Wei-Cheng Wu, Hsien-Pin Hu, Shang-Yun Hou, Chen-Hua Yu, Chao-Hsiang Yang | 2017-04-11 |
| 9601446 | Method of fabricating a bond pad structure | Hsien-Wei Chen, Hao-Yi Tsai, Yu-Wen Liu | 2017-03-21 |
| 9601443 | Test structure for seal ring quality monitor | Hao-Yi Tsai, Shih-Hsun Hsu, Shih-Cheng Chang, Shang-Yun Hou, Hsien-Wei Chen +3 more | 2017-03-21 |
| 9595506 | Packages with thermal management features for reduced thermal crosstalk and methods of forming same | Kim Hong Chen, Wensen Hung, Szu-Po Huang | 2017-03-14 |
| 9595510 | Structure and formation method for chip package | Jui-Pin Hung, Cheng-Lin Huang, Hsien-Wen Liu | 2017-03-14 |