Issued Patents 2017
Showing 1–25 of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9847256 | Methods for forming a device having a capped through-substrate via structure | Yung-Chi Lin, Yen-Hung Chen, Yin Chen, Ebin Liao, Ku-Feng Yang +1 more | 2017-12-19 |
| 9842823 | Chip-stacking apparatus having a transport device configured to transport a chip onto a substrate | Chen-Hua Yu, HsiaoYun Lo, Yi-Hsiu Chen | 2017-12-12 |
| 9831177 | Through via structure | Yung-Chi Lin, Hsin-Yu Chen, Lin-Chih Huang, Tsang-Jiuh Wu | 2017-11-28 |
| 9806062 | Methods of packaging semiconductor devices and packaged semiconductor devices | Shin-Puu Jeng, Tu-Hao Yu, Hung-Jung Tu, Yu-Liang Lin, Shih-Hui Wang | 2017-10-31 |
| 9799694 | Backside through vias in a bonded structure | Weng-Jin Wu, Ku-Feng Yang, Hung-Pin Chang, Chen-Hua Yu | 2017-10-24 |
| 9793192 | Formation of through via before contact processing | Chen-Hua Yu, Weng-Jin Wu | 2017-10-17 |
| 9786580 | Self-alignment for redistribution layer | Ku-Feng Yang, Ming-Tsu Chung, Hong-Ye Shih, Jiung Wu, Chen-Yu Tsai +2 more | 2017-10-10 |
| 9773768 | Method and structure of three-dimensional chip stacking | Chen-Hua Yu, Yung-Chi Lin | 2017-09-26 |
| 9773701 | Methods of making integrated circuits including conductive structures through substrates | Yuan-Hung Liu, Ku-Feng Yang, Pei-Ching Kuo, Ming-Tsu Chung, Hsin-Yu Chen +1 more | 2017-09-26 |
| 9754831 | Dummy structure for chip-on-wafer-on-substrate | Pei-Ching Kuo, Yi-Hsiu Chen, Jun-Lin Yeh, Yung-Chi Lin, Li-Han Hsu +2 more | 2017-09-05 |
| 9748190 | Low cost and ultra-thin chip on wafer on substrate (CoWoS) formation | Hsin-Yu Chen, Lin-Chih Huang, Tsang-Jiuh Wu, Tasi-Jung Wu | 2017-08-29 |
| 9728457 | System, structure, and method of manufacturing a semiconductor substrate stack | Hung-Pin Chang, Weng-Jin Wu, Chen-Hua Yu | 2017-08-08 |
| 9716074 | Wafer backside interconnect structure connected to TSVs | Ming-Fa Chen, Shau-Lin Shue | 2017-07-25 |
| 9711458 | Structure and formation method for chip package | Chen-Hua Yu | 2017-07-18 |
| 9698325 | Light-emitting device including reflective layer | Ding-Yuan Chen, Chia-Lin Yu, Chen-Hua Yu | 2017-07-04 |
| 9698080 | Conductor structure for three-dimensional semiconductor device | David Lu | 2017-07-04 |
| 9691840 | Cylindrical embedded capacitors | An-Jhih Su, Chi-Chun Hsieh, Tzu-Yu Wang, Wei-Cheng Wu, Hsien-Pin Hu +2 more | 2017-06-27 |
| 9679859 | Interconnect structure and method of forming same | Hsiao Yun Lo, Lin-Chih Huang, Tasi-Jung Wu, Hsin-Yu Chen, Yung-Chi Lin +2 more | 2017-06-13 |
| 9673132 | Interconnection structure with confinement layer | Hsiao Yun Lo, Yung-Chi Lin, Yang-Chih Hsueh, Tsang-Jiuh Wu | 2017-06-06 |
| 9666520 | 3D stacked-chip package | Chen-Hua Yu, Ming-Fa Chen, Wen-Sen Lu, Wen-Ching Tsai | 2017-05-30 |
| 9660016 | Method of manufacturing a capacitor | Chun Hua Chang, Der-Chyang Yeh, Kuang-Wei Cheng, Yuan-Hung Liu, Shang-Yun Hou +1 more | 2017-05-23 |
| 9653427 | Integrated circuit package with probe pad structure | Chi-Hsi Wu, Chen-Hua Yu, Hsiang-Fan Lee, Shih-Peng Tai, Tang-Jung Chiu | 2017-05-16 |
| 9633900 | Method for through silicon via structure | Chen-Hua Yu, Shin-Puu Jeng, Fang Wen Tsai, Chen-Yu Tsai | 2017-04-25 |
| 9633929 | TSV formation | Ku-Feng Yang, Shin-Puu Jeng | 2017-04-25 |
| 9601410 | Semiconductor device and method | Cheng-Chun Tsai, Hung-Pin Chang, Ku-Feng Yang, Yi-Hsiu Chen | 2017-03-21 |