Issued Patents 2017
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9847256 | Methods for forming a device having a capped through-substrate via structure | Yung-Chi Lin, Yen-Hung Chen, Yin Chen, Ebin Liao, Tsang-Jiuh Wu +1 more | 2017-12-19 |
| 9847255 | TSV formation processes using TSV-last approach | Jing-Cheng Lin, Yung-Chi Lin | 2017-12-19 |
| 9799694 | Backside through vias in a bonded structure | Weng-Jin Wu, Hung-Pin Chang, Wen-Chih Chiou, Chen-Hua Yu | 2017-10-24 |
| 9786580 | Self-alignment for redistribution layer | Ming-Tsu Chung, Hong-Ye Shih, Jiung Wu, Chen-Yu Tsai, Hsin-Yu Chen +2 more | 2017-10-10 |
| 9773701 | Methods of making integrated circuits including conductive structures through substrates | Yuan-Hung Liu, Pei-Ching Kuo, Ming-Tsu Chung, Hsin-Yu Chen, Tsang-Jiuh Wu +1 more | 2017-09-26 |
| 9754831 | Dummy structure for chip-on-wafer-on-substrate | Pei-Ching Kuo, Yi-Hsiu Chen, Jun-Lin Yeh, Yung-Chi Lin, Li-Han Hsu +2 more | 2017-09-05 |
| 9704783 | Through substrate vias with improved connections | Jing-Cheng Lin | 2017-07-11 |
| 9679859 | Interconnect structure and method of forming same | Hsiao Yun Lo, Lin-Chih Huang, Tasi-Jung Wu, Hsin-Yu Chen, Yung-Chi Lin +2 more | 2017-06-13 |
| 9633929 | TSV formation | Shin-Puu Jeng, Wen-Chih Chiou | 2017-04-25 |
| 9601410 | Semiconductor device and method | Cheng-Chun Tsai, Hung-Pin Chang, Yi-Hsiu Chen, Wen-Chih Chiou | 2017-03-21 |
| 9583465 | Three dimensional integrated circuit structure and manufacturing method of the same | Kuang-Wei Cheng, Yi-Hsiu Chen, Wen-Chih Chiou | 2017-02-28 |