Issued Patents 2017
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9847256 | Methods for forming a device having a capped through-substrate via structure | Yen-Hung Chen, Yin Chen, Ebin Liao, Ku-Feng Yang, Tsang-Jiuh Wu +1 more | 2017-12-19 |
| 9847255 | TSV formation processes using TSV-last approach | Jing-Cheng Lin, Ku-Feng Yang | 2017-12-19 |
| 9831177 | Through via structure | Hsin-Yu Chen, Lin-Chih Huang, Tsang-Jiuh Wu, Wen-Chih Chiou | 2017-11-28 |
| 9773768 | Method and structure of three-dimensional chip stacking | Chen-Hua Yu, Wen-Chih Chiou | 2017-09-26 |
| 9754831 | Dummy structure for chip-on-wafer-on-substrate | Pei-Ching Kuo, Yi-Hsiu Chen, Jun-Lin Yeh, Li-Han Hsu, Wei-Cheng Wu +2 more | 2017-09-05 |
| 9679859 | Interconnect structure and method of forming same | Hsiao Yun Lo, Lin-Chih Huang, Tasi-Jung Wu, Hsin-Yu Chen, Ku-Feng Yang +2 more | 2017-06-13 |
| 9673132 | Interconnection structure with confinement layer | Hsiao Yun Lo, Yang-Chih Hsueh, Tsang-Jiuh Wu, Wen-Chih Chiou | 2017-06-06 |
| 9570331 | Wafer cassette with electrostatic carrier charging scheme | Wen-Chih Chiou, Yu-Liang Lin, Hung-Jung Tu | 2017-02-14 |